We extend the alternating-time temporal logics ATL and ATL* with strategy contexts and memory constraints: the first extension make agents commit to their strategies during the evaluation of formulas, contrary to plain ATL where strategy quantifiers reset previously selected strategies. The second extension allows strategy quantifiers to restrict to memoryless or bounded-memory strategies. We consider expressiveness issues. We show that our logics can express important properties such as equilibria, and we formally compare them with other similar formalisms (ATL, ATL*, Game Logic, Strategy Logic, ...). We address the problem of model-checking for our logics, especially we provide a PSPACE algorithm for the sublogics involving only memoryles...
Temporal logics are a well investigated formalism for the specification verification, and synthesis ...
Temporal logics are a well investigated formalism for the specification verification, and synthesis ...
Temporal logics are a well investigated formalism for the specification verification, and synthesis ...
Nous etendons les logiques temporelles du temps alternant ATL et ATL* au moyen de contextes strategi...
Nous etendons les logiques temporelles du temps alternant ATL et ATL* au moyen de contextes strategi...
Nous etendons les logiques temporelles du temps alternant ATL et ATL* au moyen de contextes strategi...
Various extensions of the temporal logic ATL have recently been introduced to express rich propertie...
Various extensions of the temporal logicATL have recently been introduced to express rich properties...
We develop a game-theoretic semantics (GTS) for the fragment ATL+ of the Alternating-time Temporal L...
We develop a game-theoretic semantics (GTS) for the fragment ATL+ of the Alternating-time Temporal L...
In open systems verification, to formally check for reliability, one needs an appropriate formalism ...
In open systems verification, to formally check for reliability, one needs an appropriate formalism ...
In open systems verification, to formally check for reliability, one needs an appropriate formalism ...
In open systems verification, to formally check for reliability, one needs an appropriate formalism ...
Alternating-time temporal logic (ATL) is an extension of the branching-time temporal logic CTL, desi...
Temporal logics are a well investigated formalism for the specification verification, and synthesis ...
Temporal logics are a well investigated formalism for the specification verification, and synthesis ...
Temporal logics are a well investigated formalism for the specification verification, and synthesis ...
Nous etendons les logiques temporelles du temps alternant ATL et ATL* au moyen de contextes strategi...
Nous etendons les logiques temporelles du temps alternant ATL et ATL* au moyen de contextes strategi...
Nous etendons les logiques temporelles du temps alternant ATL et ATL* au moyen de contextes strategi...
Various extensions of the temporal logic ATL have recently been introduced to express rich propertie...
Various extensions of the temporal logicATL have recently been introduced to express rich properties...
We develop a game-theoretic semantics (GTS) for the fragment ATL+ of the Alternating-time Temporal L...
We develop a game-theoretic semantics (GTS) for the fragment ATL+ of the Alternating-time Temporal L...
In open systems verification, to formally check for reliability, one needs an appropriate formalism ...
In open systems verification, to formally check for reliability, one needs an appropriate formalism ...
In open systems verification, to formally check for reliability, one needs an appropriate formalism ...
In open systems verification, to formally check for reliability, one needs an appropriate formalism ...
Alternating-time temporal logic (ATL) is an extension of the branching-time temporal logic CTL, desi...
Temporal logics are a well investigated formalism for the specification verification, and synthesis ...
Temporal logics are a well investigated formalism for the specification verification, and synthesis ...
Temporal logics are a well investigated formalism for the specification verification, and synthesis ...