INTEGRATED COLOR LIGHT SENSOR WITH HIGH DYNAMIC RANGE

Doktorska disertacija obravnava implementacijo svetlobnega/barvnega senzorja in analogno digitalnega pretvornika na istem integriranem vezju (čipu), kjer za pravilno delovanje svetlobnega senzorja, umeščanja svetlobe v barvni prostor, niso potrebni dodatni barvni filtri in dragi tehnološki koraki. Integrirano vezje je realizirano v standardnem 130 nm procesu z dvema otokoma in šestimi metalnimi plastmi. Barvni senzor je sestavljen iz treh fotodiod z različnimi odzivi pri različnih valovnih dolžinah v vidnem spektru elektromagnetnega valovanja. Umeščanje odzivov fotodiod v barvni prostor (RGB) različnih svetlobnih virov, je bilo doseženo z dodatnim digitalnim procesiranjem, kjer smo s statističnim urjenjem pridobili transformacijske barvne matrike in barvne funkcije, s pomočjo katerih smo dosegli najmanjšo napako pri umeščanju svetlobe v barvni prostor pri različnih svetlobnih virih. Za doseganje barvne selektivnosti izkoriščamo različno penetracijsko globino svetlobe pri različnih valovnih dolžinah, kar nam omogoča uporabo različnih parov plasti v standardnem CMOS procesu za doseganje barvne selektivnosti. Uporabljene fotodiode so realizirane iz naslednjih plasti. Dioda, ki jo sestavljata N-otok in P-substrat ima \u27\u27rdeč\u27\u27 odziv, dioda med N+ dopirano plastjo in P-substratom ima \u27\u27zelen\u27\u27 odziv, medtem ko ima dioda med N+ plastjo in P-otokom \u27\u27moder\u27\u27 odziv. Območje generiranega toka izbranih fotodiod je med 0,1 pA in 300 nA, kar pomeni dinamično območje večje kot 120 dB. Za zagotavljanje velikega dinamičnega območja in zahtevane ločljivosti 0,1 pA ter linear- nosti skozi celotno tokovno oziroma dinamično območje, smo kot analogno digitalni pretvornik izbrali sigma-delta modulator tretjega reda z eno bitnim internim kvantizatorjem, ki omogoča teoretično razmerje med signalom in kvantizacijskim šumom enako 148 dB ter edini omogoča ločljivost boljšo od 20 bitov brez dodatnih tehnoloških posegov. Uporaba modulatorja omogoča direktno pretvorbo vhodnega toka v digitalni signal BS (ang. \u27\u27Bit Stream - BS\u27\u27), saj je prva integracijska stopnja v modulatorju časovno zvezna, naslednji stopnji pa sta časovno diskretni realizirani z vezji S-C. Uporaba časovno zveznega integratorja na vhodu, poleg direktne pretvorbe toka, poenostavi tudi parametre uporabljenega ojačevalnika, kot so: pasovna širina, hitrost spremembe izhodne napetosti ter poraba, hkrati pa izboljša šumne karakteristike. Slabosti pas sta: občutljivost na trepetanje ure ter velika odvisnost časovnih konstant na procesne parametre in temperaturo. Znižanje vpliva trepetanja ure na končno razmerje signal-šum, smo dosegli z dodatnim FIR-DAC filtrom v povratni veji, kjer smo izhod FIR-DAC filtra povezali z vhodom v časovno zvezni integrator. FIR-DAC filter deluje kot digitalno-analogni pretvornik, ki ohranja inherentno linearnost internega enobitnega kvantizatorja, z večbitnim izhodom. Povečanje števila izhodnih bitov digitalno-analognega pretvornika v povratni veji zniža vpliv trepetanja ure na končno razmerje signal šum. V disertaciji je predstavljen model ter simulacijski rezultati visokonivojskega modela modulatorja, njegova realizacija na tranzistorskem nivoju ter simulacijski rezultati preverjanja delovanja s Spice simulatorjem in izmerjeni rezultati. Delovanje modulatorja in fotodiod smo preveril s funkcionalnimi in kvalitativnimi meritvami. Poleg funkcionalnega delovanja, šuma in ojačenja modulatorja smo preverili tudi svetlobno odzivnost celotnega sistema.The PhD thesis deals with the implementation of a color sensor and an analog to digital con- verter on a single chip. The thesis presents the implementation of sigma delta modulator and the color sensor without additional optical filters, or additional expensive technology steps to achieve color selectivity and high resolution. The integrated circuit (System on Chip – SoC), which includes three photo-diodes and the modulator is implemented in a standard 130 nm twin-well CMOS process, with 6 metal layers. The color sensor is a combination of three photodiodes with different spectral responses for different wavelengths of visible light. Ideally the produced color sensor responsivity should match to RGB color-match function. To achieve matching, a set of transformation matrices is used to match the produced response to the RGB color space for different light sources. Appropriate statistical training assures minimum error for the color placement in the color space for different light sources. Three different photodiodes are usedone with a “green”, the second with “blue” and the third with “red” response. Because light has different penetration depth at different wavelengths, different layers can be used. For a ‘‘red’’ response, the N-well and P-substrate is usedfor a ‘‘green’’ response, the N+ and P-substrate is used and for a ‘‘blue’’ response a N+ and P- well is used. The light generated current of the photodiodes is in the range from 0.1 pA to 300 nA, which translates to a dynamic range of 120 dB. To achieve resolution of 0.1 pA and a dynamic range bigger that 120 dB, a sigma-delta modulator architecture was selected. High dynamic range, high linearity and 20 – bit resolution is achieved with third order sigma delta modulator with a one-bit internal quantizer, which of- fers a theoretical signal to quantization noise ratio of 148 dB. Additional advantage of the ΣΔ modulator is its ability to convert input current directly into a digital “bit-stream”. This is possible due to the fact, that the first integrating stage is continuous time and converts the photo-current of the light directly into voltage, while the second and the third integrator remain discrete time, and offer more accurate placement of poles and zeros of the noise transfer function. Continuous time integrator in the first stage simplifies the requirements of the operational amplifier like: bandwidth, slew rate, power consumption and offers lower noise. Unfortunately the continuous time integrating stage is susceptible to clock jitter and to process and environmental parameters. To reduce the clock jitter influence on the signal to noise ratio an additional FIR-DAC filter is placed in the feedback loop. The filter acts as a multi – bit digital to analog converter with inherent linearity of a single – bit digital to analog converter. The added FIR-DAC filter reduces the amplitudes of the output steps of the digital to analog converter and thus reduces the effect of the clock jitter. This work presents the model and the system level simulations of the modulator, the circuit implementation and the spice simulation results, which are compared to system level simulation results for confirmation. The modulator and the photodiodes are implemented in twin-well 130nm CMOS process with 6 metal layers. Measured results confirm the functionality of the circuit and achieved dynamic range and linearit