A design methodology for on-line testing analog linear fully differential (FD) circuits is presented in this work. The test strategy is based on concurrently monitoring via an analog checker the common mode (CM) at the inputs of all amplifiers. The totally self-checking (TSC) goal is achieved for linear FD implementations provided that the checker CM threshold is small enough with respect to the specified margins of erroneous behavior in the circuit outputs. The design methodology is illustrated for a switched-capacitor biquadratic filter and the self-checking properties evaluated for a hard/soft-fault model. A large checker threshold of 100 mV of CM is chosen since the filter implementation does not minimize nonidealities (e.g., amplifier ...
An approach to the test and diagnosis of fully differential analogue circuits is described in this p...
ISBN: 0897916905An approach to the test and diagnosis of fully differential analogue circuits is des...
This paper proposes a test approach and circuitry suitable for built-in self-test (BIST) of digital-...
A design methodology for on-line testing analog linear fully differential (FD) circuits is presented...
A design methodology for on-line testing analog linear fully differential (FD) circuits is presented...
A design methodology for on-line testing analog linear fully differential (FD) circuits is presented...
The reduction of test costs, especially in high safety systems, requires that the same test strategy...
A design methodology for analogue on-line test is presented by means of a real circuit implementatio...
ISBN: 0818638303The theory of digital self-checking circuits has been developed in order to make for...
The design of checkers aimed at the concurrent test of analog and mixed-signal circuits is considere...
International audienceThe design of checkers suitable for concurrent error detection in analogue and...
108 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1985.A Totally Self-Checking (TSC)...
108 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1985.A Totally Self-Checking (TSC)...
Due to the increasing complexity of analog circuits, finding out whether an analog circuit meets the...
This switched-current memory cell with a built-in self-test option serves as a building block for a ...
An approach to the test and diagnosis of fully differential analogue circuits is described in this p...
ISBN: 0897916905An approach to the test and diagnosis of fully differential analogue circuits is des...
This paper proposes a test approach and circuitry suitable for built-in self-test (BIST) of digital-...
A design methodology for on-line testing analog linear fully differential (FD) circuits is presented...
A design methodology for on-line testing analog linear fully differential (FD) circuits is presented...
A design methodology for on-line testing analog linear fully differential (FD) circuits is presented...
The reduction of test costs, especially in high safety systems, requires that the same test strategy...
A design methodology for analogue on-line test is presented by means of a real circuit implementatio...
ISBN: 0818638303The theory of digital self-checking circuits has been developed in order to make for...
The design of checkers aimed at the concurrent test of analog and mixed-signal circuits is considere...
International audienceThe design of checkers suitable for concurrent error detection in analogue and...
108 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1985.A Totally Self-Checking (TSC)...
108 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1985.A Totally Self-Checking (TSC)...
Due to the increasing complexity of analog circuits, finding out whether an analog circuit meets the...
This switched-current memory cell with a built-in self-test option serves as a building block for a ...
An approach to the test and diagnosis of fully differential analogue circuits is described in this p...
ISBN: 0897916905An approach to the test and diagnosis of fully differential analogue circuits is des...
This paper proposes a test approach and circuitry suitable for built-in self-test (BIST) of digital-...