The PreProcessors for the ATLAS Tile Calorimeter Phase II Upgrade

The Large Hadron Collider (LHC) has envisaged a series of upgrades towards a High Luminosity LHC (HL-LHC) delivering five times the LHC nominal instantaneous luminosity. The ATLAS Phase II upgrade will accommodate the detector and data acquisition system for the HL-LHC. In particular, the Tile Hadronic Calorimeter (TileCal) will replace completely front-end and back-end electronics using a new readout architecture. The digitized detector data will be transferred for every beam crossing to the PreProcessors (TilePPr) located in off-detector counting rooms with a total data bandwidth of roughly 80 Tbps. The TilePPr implements increased pipelines memories and must provide pre-processed digital trigger information to Level 0 trigger systems. The TilePPr system represents the link between the front-end electronics and the overall ATLAS data acquisition system. It also implements the interface between the Detector Control System (DCS) and the front-end electronics which is used to control and monitor the high voltage distribution system. The TilePPr is responsible of transmitting the commands to configure, control and monitor the front-end electronics