An additional inner layer for the existing ATLAS Pixel Detector, called Insertable B-Layer (IBL), is under design and it will be installed by LHC-PHASE1. New front-end readout ASICs fabrication (FE-I4) will replace the previous chips in this layer. The new system features higher readout speed - 160Mb/s per ASIC - and simplified control. The current data acquisition chains are composed of front-end detectors, readout chips, Back-Of-Crate (BOCs) cards and ReadOut Driver cards (RODs). The poster presents a proposal for the new ROD board, which implements modern FPGAs and high-speed links with the detector and with the ATLAS TDAQ system
The ATLAS Experiment has reworked and upgraded some electronic DAQ chains during the 2013–2015 LHC s...
ATLAS is one of the four big LHC experiments and currently its Pixel-Detector is being upgraded with...
The upgrade of the ATLAS experiment at LHC foresees the insertion of an innermost silicon layer, cal...
An additional inner layer for the existing ATLAS Pixel Detector, called Insertable B-Layer (IBL), is...
An Insertable B-Layer is planned for the upgrade of the ATLAS detector and will add a fourth and inn...
The higher luminosity that is expected for the LHC after future upgrades will require better perform...
An additional inner layer for the existing ATLAS Pixel Detector, called Insertable BLayer (IBL), is ...
During the Large Hadron Collider shutdown from 2013 to 2014 a fourth silicon layer, called the Inser...
AbstractAn Insertable B-Layer is planned for the upgrade of the ATLAS detector and will add a fourth...
The upgrade of the ATLAS experiment at LHC foresees the insertion of an innermost silicon layer, cal...
The incoming and future upgrades of LHC will require better performance by the data acquisition syst...
This work intends to briefly overview the new technological updates on the LHC ATLAS acquisition sys...
An additional inner layer for the existing ATLAS Pixel Detector, called Insertable B-Layer (IBL), is...
The ATLAS Experiment has reworked and upgraded some electronic DAQ chains during the 2013–2015 LHC s...
ATLAS is one of the four big LHC experiments and currently its Pixel-Detector is being upgraded with...
The upgrade of the ATLAS experiment at LHC foresees the insertion of an innermost silicon layer, cal...
An additional inner layer for the existing ATLAS Pixel Detector, called Insertable B-Layer (IBL), is...
An Insertable B-Layer is planned for the upgrade of the ATLAS detector and will add a fourth and inn...
The higher luminosity that is expected for the LHC after future upgrades will require better perform...
An additional inner layer for the existing ATLAS Pixel Detector, called Insertable BLayer (IBL), is ...
During the Large Hadron Collider shutdown from 2013 to 2014 a fourth silicon layer, called the Inser...
AbstractAn Insertable B-Layer is planned for the upgrade of the ATLAS detector and will add a fourth...
The upgrade of the ATLAS experiment at LHC foresees the insertion of an innermost silicon layer, cal...
The incoming and future upgrades of LHC will require better performance by the data acquisition syst...
This work intends to briefly overview the new technological updates on the LHC ATLAS acquisition sys...
An additional inner layer for the existing ATLAS Pixel Detector, called Insertable B-Layer (IBL), is...
The ATLAS Experiment has reworked and upgraded some electronic DAQ chains during the 2013–2015 LHC s...
ATLAS is one of the four big LHC experiments and currently its Pixel-Detector is being upgraded with...
The upgrade of the ATLAS experiment at LHC foresees the insertion of an innermost silicon layer, cal...