The Fast Tracker Architecture for the LHC baseline luminosity

Hadron collider experiments search for extremely rare processes hidden in much higher background levels. Only a tiny fraction of the produced collisions can be stored on tape and an enormous real-time data reduction is needed. This requires massive computing power to minimize the on-line execution time of complex algorithms. A multi-level trigger is an effective solution for an otherwise impossible problem. The Fast Tracker (FTK) [1, 2] has been proposed for high quality track finding at very high rates (Level-1 output rates) for the ATLAS experiment. FTK will use FPGA and ASIC devices in order to complement CPUs. FTK beats the combinatorial challenge with special associative memories, where parallelism is exploited to the maximum level. The associative memories compare the track detector hits to all pre-calculated track patterns at once. The system design is defined and proposed for high-luminosity studies including low-PT Bphysics and high-PT signatures for Level-2 selections: b-jets, tau-jets, and isolated light leptons. We test FTK algorithms using ATLAS full simulation with WH and Hqq events at 1034 cm2s1. The reconstruction quality is evaluated comparing FTK results with the tracking capability of an offline tracking algorithm. We show that similar resolutions and efficiencies are reached by FTK. The online use of the whole silicon tracker is necessary to obtain the low fake rate typical of the offline