Link to the conference: http://www.iasted.org/conferences/pastinfo-668.htmlWe describe four partitioning strategies, or patterns, used to decompose a serial application into multiple concurrently executing parts. These partitioning strategies augment the commonly used task and data parallel patterns by recognizing that applications are spatiotemporal in nature. There fore, data and instruction decomposition are further distinguished by whether the partitioning is done in the spatial or in temporal dimension. Thus, we arrive at four decomposition strategies: spatial data partitioning (SDP), temporal data partitioning (TDP), spatial instruction partitioning (SIP), and temporal instruction partitioning (TIP), and catalog the benefits and drawba...
There is a trend towards using accelerators to increase performance and energy efficiency of general...
Achieving optimal throughput by extracting parallelism in behavioral synthesis often exaggerates mem...
Advances in VLSI technology will enable chips with over a billion transistors within the next decade...
This work presents four partitioning strategies, or design patterns, useful for decomposing a serial...
The H.264/AVC standard is a highly efficient video codec providing high-quality videos at low bit-ra...
To attain efficient coding of sequences with complex motion activity, modern video coding standards ...
The efficient solution of a large problem on a small systolic array requires good partitioning techn...
A compressed video bitstream can be partitioned according to the coding priority of the data, allowi...
Heterogeneity, decoupling, and dynamics in distributed, component-based applications indicate the ne...
In the heterogeneous computing execution model, one or more general-purpose processors are accelerat...
Traditional program partitioning methods are nonlinear, and their computational efforts increase exp...
. Video partitioning is the segmentation of a video sequence into visually independent partitions, w...
In this paper, the parallelization of the H.261 video coding algorithm on the IBM SP2 multiprocessor...
An important question is whether emerging and future applications exhibit sufficient parallelism, in...
In the context of sequential computers, it is common practice to exploit temporal locality of refer...
There is a trend towards using accelerators to increase performance and energy efficiency of general...
Achieving optimal throughput by extracting parallelism in behavioral synthesis often exaggerates mem...
Advances in VLSI technology will enable chips with over a billion transistors within the next decade...
This work presents four partitioning strategies, or design patterns, useful for decomposing a serial...
The H.264/AVC standard is a highly efficient video codec providing high-quality videos at low bit-ra...
To attain efficient coding of sequences with complex motion activity, modern video coding standards ...
The efficient solution of a large problem on a small systolic array requires good partitioning techn...
A compressed video bitstream can be partitioned according to the coding priority of the data, allowi...
Heterogeneity, decoupling, and dynamics in distributed, component-based applications indicate the ne...
In the heterogeneous computing execution model, one or more general-purpose processors are accelerat...
Traditional program partitioning methods are nonlinear, and their computational efforts increase exp...
. Video partitioning is the segmentation of a video sequence into visually independent partitions, w...
In this paper, the parallelization of the H.261 video coding algorithm on the IBM SP2 multiprocessor...
An important question is whether emerging and future applications exhibit sufficient parallelism, in...
In the context of sequential computers, it is common practice to exploit temporal locality of refer...
There is a trend towards using accelerators to increase performance and energy efficiency of general...
Achieving optimal throughput by extracting parallelism in behavioral synthesis often exaggerates mem...
Advances in VLSI technology will enable chips with over a billion transistors within the next decade...