Heavy-ion-induced single events transients (SETs) in advanced digital circuits are a significant reliability issue for space-based systems. SET pulse widths in silicon-on-insulator (SOI) technologies are often significantly shorter than those in comparable bulk technologies. In this paper, heavy-ion-induced digital single-event transient measurements are presented for a 180-nm fully depleted SOI technology. Upset cross-sections for this technology with and without body-ties are analyzed using 3-D TCAD simulations. Pulse broadening is shown to lengthen the measured SET pulse widths significantly for the circuit without body contacts
Analysis of single event transients (SETs) generated in field programmable gate arrays (FPGA) under ...
The objective of the presented research is to investigate the effects of radiation, particularly sin...
Microelectronic devices and systems have been extensively utilized in a variety of radiation environ...
International audienceThis paper presents the analysis of pulse quenching effects induced in silicon...
Effects of ionizing radiation on single event transients are reported for Fully Depleted SOI (FDSOI)...
International audienceWe investigate the impact of performance boosters using mechanical stress on t...
International audienceWe investigate the impact of performance boosters using mechanical stress on t...
A table-based method for the estimation of heavy-ion-induced Digital Single Event Transient (DSET) v...
Factors that affect single-event transient pulse widths, such as drift, diffusion, and parasitic bip...
The characteristics Of ion-induced charge collection and single-event upset are studied in SOI trans...
Abstract — Single-event upset effects from heavy ions were measured for Motorola silicon-on-insulato...
This paper presents a compact model implemented in Verilog-A for partially depleted (PD) silicon-on-...
In this paper, we develop a model to simulate the single event transient (SET) phenomena in LDMOS-SO...
Silicon-on-insulator (SOI) technologies have been developed for radiation-hardened military and spac...
In this paper, we develop a model to simulate the single event transient (SET) phenomena in LDMOS-SO...
Analysis of single event transients (SETs) generated in field programmable gate arrays (FPGA) under ...
The objective of the presented research is to investigate the effects of radiation, particularly sin...
Microelectronic devices and systems have been extensively utilized in a variety of radiation environ...
International audienceThis paper presents the analysis of pulse quenching effects induced in silicon...
Effects of ionizing radiation on single event transients are reported for Fully Depleted SOI (FDSOI)...
International audienceWe investigate the impact of performance boosters using mechanical stress on t...
International audienceWe investigate the impact of performance boosters using mechanical stress on t...
A table-based method for the estimation of heavy-ion-induced Digital Single Event Transient (DSET) v...
Factors that affect single-event transient pulse widths, such as drift, diffusion, and parasitic bip...
The characteristics Of ion-induced charge collection and single-event upset are studied in SOI trans...
Abstract — Single-event upset effects from heavy ions were measured for Motorola silicon-on-insulato...
This paper presents a compact model implemented in Verilog-A for partially depleted (PD) silicon-on-...
In this paper, we develop a model to simulate the single event transient (SET) phenomena in LDMOS-SO...
Silicon-on-insulator (SOI) technologies have been developed for radiation-hardened military and spac...
In this paper, we develop a model to simulate the single event transient (SET) phenomena in LDMOS-SO...
Analysis of single event transients (SETs) generated in field programmable gate arrays (FPGA) under ...
The objective of the presented research is to investigate the effects of radiation, particularly sin...
Microelectronic devices and systems have been extensively utilized in a variety of radiation environ...