Design Specifications for a Radiation Tolerant Beam Loss Measurement ASIC

A novel radiation-hardened current digitizer ASIC is in planning stage, aimed at the acquisition of the current signals from the ionization chambers employed in the Beam Loss Monitoring system at CERN. The purpose is to match and exceed the performance of the existing discrete component design, currently in operation in the Large Hadron Collider (LHC). The specifications include: a dynamic range of nine decades, defaulting to the 1 pA-1mA range but adjustable by the user, ability to withstand a total integrated dose of 10 kGy at least in 20 years of operation and user selectable integrating windows, as low as 500 ns. Moreover, the integrated circuit should be able to digitize currents of both polarity with a minimum number of external components and without needing any configuration. The target technology is the IBM 130nm CMOS process. The specifications, the architecture choices and the reasons on which they are based upon are discussed in this paper