Add to ORKGTernary logic circuits can reduce circuit power consumption and interconnections. We propose a ternary to binary converter that uses multi-threshold CMOS (MTCMOS) for energy-efficient logic converting to use these benefits. We reduce the delay by 8.61%, power by 28.72% compared to the previous design. We also reduce area, and the number of transistors compared to the existing converter design.1
We propose a logic synthesis methodology with a novel low-power circuit structure for ternary logic....
The power density limits of complementary metal???oxide???semiconductor (CMOS) technology could be o...
MasterIn recent decades, complementary metal-oxide-semiconductor (CMOS) based binary digital systems...
We presented the ternary logic using a threshold switch (TS) that enabled faster operation than the ...
Multiple-valued logic (MVL) has potential advantages for energy-efficient design by reducing a circu...
Multiple-Valued Logic systems present significant improvements in terms of energy consumption over b...
Ternary logic is more power-efficient than binary logic because of lower device count required to pe...
Abstract- We introduce a new ternary link including a binary- The most common implementation of this...
Over the last few decades, CMOS-based digital circuits have been steadily developed. However, becaus...
We propose the feasible and scalable ternary CMOS (T-CMOS) device platform for a fully CMOS-compatib...
Reducing delay, power consumption, and chip area of a logic circuit are the main targets of a design...
In this paper, a new ternary multiplexer has been analyzed which are fundamental components of all t...
Three valued logic which is also called as a ternary logic is a best alternative to conventional bin...
With the progression of information technology, there has been a burgeoning demand for processing vo...
This work presents comparison of ternary combinational digital circuits that reduce energy consumpti...
We propose a logic synthesis methodology with a novel low-power circuit structure for ternary logic....
The power density limits of complementary metal???oxide???semiconductor (CMOS) technology could be o...
MasterIn recent decades, complementary metal-oxide-semiconductor (CMOS) based binary digital systems...
We presented the ternary logic using a threshold switch (TS) that enabled faster operation than the ...
Multiple-valued logic (MVL) has potential advantages for energy-efficient design by reducing a circu...
Multiple-Valued Logic systems present significant improvements in terms of energy consumption over b...
Ternary logic is more power-efficient than binary logic because of lower device count required to pe...
Abstract- We introduce a new ternary link including a binary- The most common implementation of this...
Over the last few decades, CMOS-based digital circuits have been steadily developed. However, becaus...
We propose the feasible and scalable ternary CMOS (T-CMOS) device platform for a fully CMOS-compatib...
Reducing delay, power consumption, and chip area of a logic circuit are the main targets of a design...
In this paper, a new ternary multiplexer has been analyzed which are fundamental components of all t...
Three valued logic which is also called as a ternary logic is a best alternative to conventional bin...
With the progression of information technology, there has been a burgeoning demand for processing vo...
This work presents comparison of ternary combinational digital circuits that reduce energy consumpti...
We propose a logic synthesis methodology with a novel low-power circuit structure for ternary logic....
The power density limits of complementary metal???oxide???semiconductor (CMOS) technology could be o...
MasterIn recent decades, complementary metal-oxide-semiconductor (CMOS) based binary digital systems...