Add to ORKGAlso issued as Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1988.Includes bibliographical references.Supported by the U.S. Air Force--Office of Scientific Research. AFOSR-86-0164 Supported in part by a National Science Foundation Graduate Fellowship. Supported in part by Thinking Machines Corporation. 2305/B4Donald George Baltus
The direct automated transformation of a circuit into the "best" physical layout is hard. An alterna...
158 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1986.A new approach is introduced ...
An imbedded language system for the layout of very large scale integration (VLSI) circuits is examin...
Optimization of size is an important topic of research in the engineering of digital circuits. The f...
As the technology advances, millions of transistors can be integrated on a small chip area. With the...
Contains report on one research project.U.S. Air Force - Office of Scientific Research (Contract F49...
Originally presented as author's thesis (M.S.--Massachusetts Institute of Technology), 1985.Bibliogr...
We describe the use of a form of machine learning which makes efficient use of time and computing re...
In recent years the drive to produce more complex integrated circuits while spending less design tim...
132 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1983.The NMOS Gate-Cell, a regular...
This paper describes the characteristics of a new CAD tool that enables the creation of layout libra...
Also issued as Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering...
The problem of automatic layout synthesis is addressed. Given a description of the cell circuit to b...
The performance of analog circuits is critically dependent on layout parasitics, but the layout has ...
Transistor structure development represents a compelling way of bettering VLSI circuits. In VLSI mic...
The direct automated transformation of a circuit into the "best" physical layout is hard. An alterna...
158 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1986.A new approach is introduced ...
An imbedded language system for the layout of very large scale integration (VLSI) circuits is examin...
Optimization of size is an important topic of research in the engineering of digital circuits. The f...
As the technology advances, millions of transistors can be integrated on a small chip area. With the...
Contains report on one research project.U.S. Air Force - Office of Scientific Research (Contract F49...
Originally presented as author's thesis (M.S.--Massachusetts Institute of Technology), 1985.Bibliogr...
We describe the use of a form of machine learning which makes efficient use of time and computing re...
In recent years the drive to produce more complex integrated circuits while spending less design tim...
132 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1983.The NMOS Gate-Cell, a regular...
This paper describes the characteristics of a new CAD tool that enables the creation of layout libra...
Also issued as Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering...
The problem of automatic layout synthesis is addressed. Given a description of the cell circuit to b...
The performance of analog circuits is critically dependent on layout parasitics, but the layout has ...
Transistor structure development represents a compelling way of bettering VLSI circuits. In VLSI mic...
The direct automated transformation of a circuit into the "best" physical layout is hard. An alterna...
158 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1986.A new approach is introduced ...
An imbedded language system for the layout of very large scale integration (VLSI) circuits is examin...