The recent popularity of Field Programmable Gate Array (FPGA) technology has made the synthesis of Hardware Description Language (HDL) programs into FPGAs a very attractive topic for research. In particular, the correctness in the synthesis of an FPGA programming file from a source HDL program has gained significant relevance in the context of safety or mission-critical systems. The results presented here are part of a research project aiming at producing a verified compiler for the Handel-C language. Handel-C is a high level HDL based on the syntax of the C language extended with constructs to deal with parallel behaviour and process communications based on CSP. Given the complexity of designing a provably correct compiler for a lan...
Various languages have been proposed to describe synchronous hardware at an abstract, yet synthesisa...
We present an overview of the evolution of programming techniques for Field-Programmable Gate Arrays...
International audienceFormal verification of software or hardware systems — be it by model checking,...
The recent popularity of Field Programmable Gate Array (FPGA) technology has made the synthesis of H...
AbstractWe present a denotational semantics for the hardware compilation language Handel-C that maps...
AbstractThe compilation of Handel-C programs into net-list descriptions of hardware components has b...
AbstractThe compilation of Handel-C programs into net-list descriptions of hardware components has b...
AbstractHandel-C is a programming language which is a hybrid of CSP and C, designed to target hardwa...
Hardware description languages usually include features which do not have a direct hardware inter...
International audienceWe report on the implementation of a certified compiler for a high-level hardw...
In this paper, we show a combination of the process algebra CSP and the state-based formalism B, com...
High-level synthesis (HLS), which refers to the automatic compilation of software into hardware, is ...
The use of hardware compilers to generate complex circuits from a high-level description is becoming...
This thesis explores building provably correct software and hardware inside the HOL4 interactive the...
Describing correct circuits remains a tall order, despite four decades of evolution in Hardware Desc...
Various languages have been proposed to describe synchronous hardware at an abstract, yet synthesisa...
We present an overview of the evolution of programming techniques for Field-Programmable Gate Arrays...
International audienceFormal verification of software or hardware systems — be it by model checking,...
The recent popularity of Field Programmable Gate Array (FPGA) technology has made the synthesis of H...
AbstractWe present a denotational semantics for the hardware compilation language Handel-C that maps...
AbstractThe compilation of Handel-C programs into net-list descriptions of hardware components has b...
AbstractThe compilation of Handel-C programs into net-list descriptions of hardware components has b...
AbstractHandel-C is a programming language which is a hybrid of CSP and C, designed to target hardwa...
Hardware description languages usually include features which do not have a direct hardware inter...
International audienceWe report on the implementation of a certified compiler for a high-level hardw...
In this paper, we show a combination of the process algebra CSP and the state-based formalism B, com...
High-level synthesis (HLS), which refers to the automatic compilation of software into hardware, is ...
The use of hardware compilers to generate complex circuits from a high-level description is becoming...
This thesis explores building provably correct software and hardware inside the HOL4 interactive the...
Describing correct circuits remains a tall order, despite four decades of evolution in Hardware Desc...
Various languages have been proposed to describe synchronous hardware at an abstract, yet synthesisa...
We present an overview of the evolution of programming techniques for Field-Programmable Gate Arrays...
International audienceFormal verification of software or hardware systems — be it by model checking,...