To achieve improved real-time performance, hardware-based speech recognition systems have emerged in recent years. While past efforts have demonstrated drastic improvements over software-based speech recognition systems, the tradeoffs between vocabulary size and performance remain. This work reviews several approaches to hardware-based speech recognition and discusses in detail the manner in which information pertaining to vocabulary is stored, accessed and used in speech recognition. Furthermore, we investigate the connections among speed, accuracy, robustness and the implementation selected for a large vocabulary speech recognition system in hardware
For years researchers have worked toward finding a way to allow people to talk to machines in the sa...
We have developed a VLSI chip for 5,000 word speaker-independent continuous speech recognition. This...
This master thesis characterizes the performance and energy bottlenecks of speech recognition system...
While commercial speech recognition systems remain limited in their capabilities, research systems a...
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constr...
Speech recognition has been used recently in various applications such as automatic transcript, webs...
Hardware-accelerated speech recognition is needed to supplement today’s cloud-based systems in power...
This paper presents a system for large vocabulary continuous speech recognition in condition of cons...
To achieve much faster decoding, or much lower power consumption, we need to liberate speech recogni...
Automatic speech recognition enables a wide range of current and emerging applications such as autom...
This thesis presents a fully pipelined and parameterised parallel hardware implementation of a large...
We describe an IC that provides a local speech recognition capability for a variety of electronic de...
To achieve much faster decoding, or much lower power consumption, we need to liberate speech recogni...
A real‐time prototype speech recognizer has been implemented on a 66‐processor distributed‐memory pa...
The use of variable-width features (prosodics, broad structural information etc.) in large vocabular...
For years researchers have worked toward finding a way to allow people to talk to machines in the sa...
We have developed a VLSI chip for 5,000 word speaker-independent continuous speech recognition. This...
This master thesis characterizes the performance and energy bottlenecks of speech recognition system...
While commercial speech recognition systems remain limited in their capabilities, research systems a...
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constr...
Speech recognition has been used recently in various applications such as automatic transcript, webs...
Hardware-accelerated speech recognition is needed to supplement today’s cloud-based systems in power...
This paper presents a system for large vocabulary continuous speech recognition in condition of cons...
To achieve much faster decoding, or much lower power consumption, we need to liberate speech recogni...
Automatic speech recognition enables a wide range of current and emerging applications such as autom...
This thesis presents a fully pipelined and parameterised parallel hardware implementation of a large...
We describe an IC that provides a local speech recognition capability for a variety of electronic de...
To achieve much faster decoding, or much lower power consumption, we need to liberate speech recogni...
A real‐time prototype speech recognizer has been implemented on a 66‐processor distributed‐memory pa...
The use of variable-width features (prosodics, broad structural information etc.) in large vocabular...
For years researchers have worked toward finding a way to allow people to talk to machines in the sa...
We have developed a VLSI chip for 5,000 word speaker-independent continuous speech recognition. This...
This master thesis characterizes the performance and energy bottlenecks of speech recognition system...