The intent of the proposed effort is the examination of the impact of the elements of parallel architectures on the performance realized in a parallel computation. To this end, three major projects are developed: a language for the expression of high level parallelism, a statistical technique for the synthesis of multicomputer interconnection networks based upon performance prediction, and a queueing model for the analysis of shared memory hierarchies
Parallel graph reduction is a conceptually simple model for the concurrent evaluation of lazy functi...
With the rapid advancement of parallel and distributed computing (PDC), three types of hardware and ...
textabstractParallel computation offers a challenging opportunity to speed up the time consuming enu...
A workshop was held in an attempt to program real problems on the MIT Static Data Flow Machine. Most...
We present an overview of the state of the art and future trends in high performance parallel and di...
We present an overview of the state of the art and future trends in high performance parallel and di...
The adaptation of a finite element program with explicit time integration to a massively parallel SI...
Highly parallel computing architectures are the only means to achieve the computation rates demanded...
Although parallel computers have existed for many years, recently there has been a surge of academic...
Instruction pipelining, out-of-order execution, and branch prediction are techniques that improve pe...
EASY-FLOW, a very high-level data flow language, is introduced for the purpose of adapting programs ...
my own. Where information has been derived from other sources, I confirm that this has been indicate...
This session explores, through the use of formal methods, the “intuition” used in creating a paralle...
Two testbed programming environments to support the evaluation of a large range of parallel architec...
A description is given of the hardware and software of a multiprocessor test bed - the second genera...
Parallel graph reduction is a conceptually simple model for the concurrent evaluation of lazy functi...
With the rapid advancement of parallel and distributed computing (PDC), three types of hardware and ...
textabstractParallel computation offers a challenging opportunity to speed up the time consuming enu...
A workshop was held in an attempt to program real problems on the MIT Static Data Flow Machine. Most...
We present an overview of the state of the art and future trends in high performance parallel and di...
We present an overview of the state of the art and future trends in high performance parallel and di...
The adaptation of a finite element program with explicit time integration to a massively parallel SI...
Highly parallel computing architectures are the only means to achieve the computation rates demanded...
Although parallel computers have existed for many years, recently there has been a surge of academic...
Instruction pipelining, out-of-order execution, and branch prediction are techniques that improve pe...
EASY-FLOW, a very high-level data flow language, is introduced for the purpose of adapting programs ...
my own. Where information has been derived from other sources, I confirm that this has been indicate...
This session explores, through the use of formal methods, the “intuition” used in creating a paralle...
Two testbed programming environments to support the evaluation of a large range of parallel architec...
A description is given of the hardware and software of a multiprocessor test bed - the second genera...
Parallel graph reduction is a conceptually simple model for the concurrent evaluation of lazy functi...
With the rapid advancement of parallel and distributed computing (PDC), three types of hardware and ...
textabstractParallel computation offers a challenging opportunity to speed up the time consuming enu...