Undoped, thin-layer silicon-on-insulator was fabricated using wafer bonding and selective etching techniques employing a molecular beam epitaxy (MBE) grown Si0.7Ge0.3 layer as an etch stop. Defect free, undoped 200-350 nm silicon layers over silicon dioxide are routinely fabricated using this procedure. A new selective silicon-germanium etch was developed that significantly improves the ease of fabrication of the bond and etch back silicon insulator (BESOI) material
Bonding and Etchback Silicon on Insulator wafers were successfully developed at the Rochester Instit...
An attempt is made at the preparation of silicon-on-insulator (SOl) substrates suitable for device f...
Since the mid-20th century, the electronics industry has enjoyed a phenomenal growth and is now one ...
Silicon-on-insulator (SOI) technology improves the performance of devices by reducing parasitic capa...
A microelectric process technology has been developed to allow the fabrication of high-quality, unif...
Silicon on Insulator (SOI) has long been the forerunner of the CMOS technology in the last decade o...
Silicon-on-insulator devices have problems with both performance and cost. We developed three advanc...
SiGe on Insulator (SiGeOI) is an improved substrate for MOS devices since it combines both the benef...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, ...
peer reviewedSSOI substrates were successfully fabricated using He+ ion implantation and annealing t...
In this work, we have developed two different fabrication processes for relaxed Si₁₋xG...
Silicon on Insulator (SOI) has long been the forerunner of the CMOS technology in the last decade of...
This paper reports a process for the formation of very high quality single-crystal silicon films on ...
Multiple layers of Silicon-on-Insulator (MLSOI) device islands fabrication process was developed for...
SOI technology has quickly evolved from the first laser recrystallization experiments of the early e...
Bonding and Etchback Silicon on Insulator wafers were successfully developed at the Rochester Instit...
An attempt is made at the preparation of silicon-on-insulator (SOl) substrates suitable for device f...
Since the mid-20th century, the electronics industry has enjoyed a phenomenal growth and is now one ...
Silicon-on-insulator (SOI) technology improves the performance of devices by reducing parasitic capa...
A microelectric process technology has been developed to allow the fabrication of high-quality, unif...
Silicon on Insulator (SOI) has long been the forerunner of the CMOS technology in the last decade o...
Silicon-on-insulator devices have problems with both performance and cost. We developed three advanc...
SiGe on Insulator (SiGeOI) is an improved substrate for MOS devices since it combines both the benef...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, ...
peer reviewedSSOI substrates were successfully fabricated using He+ ion implantation and annealing t...
In this work, we have developed two different fabrication processes for relaxed Si₁₋xG...
Silicon on Insulator (SOI) has long been the forerunner of the CMOS technology in the last decade of...
This paper reports a process for the formation of very high quality single-crystal silicon films on ...
Multiple layers of Silicon-on-Insulator (MLSOI) device islands fabrication process was developed for...
SOI technology has quickly evolved from the first laser recrystallization experiments of the early e...
Bonding and Etchback Silicon on Insulator wafers were successfully developed at the Rochester Instit...
An attempt is made at the preparation of silicon-on-insulator (SOl) substrates suitable for device f...
Since the mid-20th century, the electronics industry has enjoyed a phenomenal growth and is now one ...