This paper introduces an improved method for designing the class of CMOS VLSI asynchronous sequential circuits introduced in the paper by Sterling R. Whitaker and Gary K. Maki, 'Self Arbitrated VLSI Asynchronous Circuits.' Of main interest here is the simple design by inspection rules that arise from these circuits. This paper presents a variation on these circuits which reduces the number of transistors required
The implementation of digital signal processor circuits via self-timed techniques is currently a va...
As semiconductor technology scales down, process variations become increasingly difficult to control...
[[abstract]]This paper discusses the technique for asynchronous circuit design using a novel asynchr...
Tracey's Theorem has long been recognized as essential in generating state assignments for asynchron...
A new basic VLSI circuit element is presented that can be used to realize pulse mode asynchronous se...
Journal ArticleRecent practical advances in asynchronous circuit and system design have resulted in ...
A systematic, asynchronous design method based on a flow diagram is shown. The realizat...
The iterative logic array (ILA) is introduced as a new architecture for asynchronous sequential circ...
The performance characteristics of asynchronous circuits are quite different from those of their syn...
Journal ArticleAsynchronous or self-timed systems that do not rely on U global clock to keep system...
Journal ArticleWe present a tool called MEAT which has been designed to automatically synthesize tra...
technical reportAsynchronous/'Self-Timed designs are beginning to attract attention as promising mea...
SoC design will require asynchronous techniques as the large parameter variations across the chip wi...
This paper describes a novel methodology for high performance asynchronous design based on timed cir...
Modern technological processes for producing VLSI circuits have created an opportunity to exploit th...
The implementation of digital signal processor circuits via self-timed techniques is currently a va...
As semiconductor technology scales down, process variations become increasingly difficult to control...
[[abstract]]This paper discusses the technique for asynchronous circuit design using a novel asynchr...
Tracey's Theorem has long been recognized as essential in generating state assignments for asynchron...
A new basic VLSI circuit element is presented that can be used to realize pulse mode asynchronous se...
Journal ArticleRecent practical advances in asynchronous circuit and system design have resulted in ...
A systematic, asynchronous design method based on a flow diagram is shown. The realizat...
The iterative logic array (ILA) is introduced as a new architecture for asynchronous sequential circ...
The performance characteristics of asynchronous circuits are quite different from those of their syn...
Journal ArticleAsynchronous or self-timed systems that do not rely on U global clock to keep system...
Journal ArticleWe present a tool called MEAT which has been designed to automatically synthesize tra...
technical reportAsynchronous/'Self-Timed designs are beginning to attract attention as promising mea...
SoC design will require asynchronous techniques as the large parameter variations across the chip wi...
This paper describes a novel methodology for high performance asynchronous design based on timed cir...
Modern technological processes for producing VLSI circuits have created an opportunity to exploit th...
The implementation of digital signal processor circuits via self-timed techniques is currently a va...
As semiconductor technology scales down, process variations become increasingly difficult to control...
[[abstract]]This paper discusses the technique for asynchronous circuit design using a novel asynchr...