Add to ORKGThis document reports the status of the NEPP Double Data Rate (DDR) Device Reliability effort for FY2013. The task targeted general reliability of > 100 DDR2 devices from Hynix, Samsung, and Micron. Detailed characterization of some devices when stressed by several data storage patterns was studied, targeting ability of the data cells to store the different data patterns without refresh, highlighting the weakest bits. DDR2, Reliability, Data Retention, Temperature Stress, Test System Evaluation, General Reliability, IDD measurements, electronic parts, parts testing, microcircuit
The goal of this study was to perform an independent investigation of single event destructive and t...
The Impulsive Mission Analysis (IMA) computer program provides a user-friendly means of designing a ...
A software simulator capability of simulating execution of an algorithm graph on a given system unde...
The Department of Homeland Security National Cyber Security Division supported development of a cont...
This document reports the status of the NASA Electronic Parts and Packaging (NEPP) Double Data Rate ...
Mainstream non-volatile memory technology, dominated by the floating gate transistor, has historical...
This paper discusses security issues as they relate to the NASA Electronic Library System which is c...
NASA's Space Station Freedom Program (SSFP) planning efforts have identified a need for a payload tr...
Structured Application-Specific Integrated Circuit (ASIC) technology is a platform between tradition...
The overall objective of this program is to design and develop an advanced traction motor that will ...
The capabilities and design approach of the MIDAS (Man-machine Integration Design and Analysis Syste...
With legacy technologies present and approaching new wireless standards, the 1-10 GHz band of freque...
Recent increases in cybercrime suggest questions such as: How can one trust a secure system? How can...
Test process, milestones and inputs are unknowns to first-time users of the Advanced Materials Labor...
This document outlines the design and implementation of a low-cost, low-power acceleration data reco...
The goal of this study was to perform an independent investigation of single event destructive and t...
The Impulsive Mission Analysis (IMA) computer program provides a user-friendly means of designing a ...
A software simulator capability of simulating execution of an algorithm graph on a given system unde...
The Department of Homeland Security National Cyber Security Division supported development of a cont...
This document reports the status of the NASA Electronic Parts and Packaging (NEPP) Double Data Rate ...
Mainstream non-volatile memory technology, dominated by the floating gate transistor, has historical...
This paper discusses security issues as they relate to the NASA Electronic Library System which is c...
NASA's Space Station Freedom Program (SSFP) planning efforts have identified a need for a payload tr...
Structured Application-Specific Integrated Circuit (ASIC) technology is a platform between tradition...
The overall objective of this program is to design and develop an advanced traction motor that will ...
The capabilities and design approach of the MIDAS (Man-machine Integration Design and Analysis Syste...
With legacy technologies present and approaching new wireless standards, the 1-10 GHz band of freque...
Recent increases in cybercrime suggest questions such as: How can one trust a secure system? How can...
Test process, milestones and inputs are unknowns to first-time users of the Advanced Materials Labor...
This document outlines the design and implementation of a low-cost, low-power acceleration data reco...
The goal of this study was to perform an independent investigation of single event destructive and t...
The Impulsive Mission Analysis (IMA) computer program provides a user-friendly means of designing a ...
A software simulator capability of simulating execution of an algorithm graph on a given system unde...