Efficient integer frequency offset estimation architecture for enhanced OFDM synchronization

In orthogonal frequency-division multiplexing (OFDM) systems, integer frequency offset (IFO) causes a circular shift of the sub-carrier indices in the frequency domain. IFO can be mitigated through strict RF front-end design, which tends to be expensive, or by strictly limiting mobility and channel agility, which constrains operating scenarios. IFO is therefore often estimated and removed at baseband, allowing implementations to benefit from relaxed RF front-end specifications and be tolerant to both Doppler shift and multi-standard channel selection. This paper proposes a novel architecture for IFO estimation which achieves reduced power consumption and lower computational cost than contemporary methods, while achieving excellent estimation performance, close to theoretically achievable bounds. A pilot subsampling technique enables four-fold resource sharing to reduce computational cost, while multiplierless computation yields further power reduction. Performance exceeds that of conventional techniques, while being much more efficient. When implemented on FPGA for IEEE 802.16-2009, dynamic power reductions of 78% are achieved. The architecture and method is applicable to other OFDM standards including IEEE 802.11 and IEEE 802.22