Comparing SiC MOSFET, IGBT and Si MOSFET in LV distribution inverters

Efficency, power quality and EMI are three crucial performance drivers in LVDC applications such as electrical supply, EV charging or DC aerospace. Recent developments in SiC MOSFETs and MMC for LVDC promise two significant improvements in LVDC inverter performance. However, the designer is left with many combinations of technology and inverter level to choose from. This paper aims to clarify this choice by identifying one optimum Si design and one optimum SiC design, using detailed loss calculations. An IGBT inverter is included as a baseline. Loss calculations estimate the effects of Si MOSFET switching loss and all parasitic interconnection loss. The validity of the loss estimations are verified using careful experiments on a Si MOSFET cell. Close agreement indicates that the modelling approach is valid for extension to many cells in series, and to the parallel connection of many devices. Despite the lower EMI inherent in MMC inverters, Si MOSFETs risk worse EMI, due to poor reverse recovery characteristic. Slowed device gate switching experimentally demonstrates the reduction in switching noise, promising very low EMI. This initial study has therefore identified two promising candidate SiC and Si MOSFET inverters which will be fully constructed in future work, in order to aid designers in choosing the optimum semiconductor technology and topology for LVDC inverters