A key requirement for modern Networks-on-Chip (NoC) is the ability to detect and diagnose faults and failures. This paper addresses the challenge of fault diagnosis using online testing where the interruption of the runtime operation (performance) under diagnosis is minimised. A novel Monitor Module (MM) is proposed to detect NoC interconnect faults which minimise the intrusion of the regular NoC traffic throughput by (1) using a channel tester which only examines NoC channels when they are idle; and (2) using a testing interval parameter based on the Binary Exponential Back off algorithm to dynamically balance the level of testing when recovering from temporary faults. The paper presents results on the minimal impact on NoC throughput for ...
International audienceThe use of fault-tolerant mechanism is essential to ensure the correct functio...
The demands of future computing, as well as the challenges of nanometer-era VLSI design, will requir...
A new distributed on-line test mechanism for NoCs is proposed which scales to large-scale networks w...
A key requirement for modern Networks-on-Chip (NoC) is the ability to detect and diagnose faults and...
A key requirement for modern Networks-on-Chip (NoC) is the ability to detect and diagnose faults and...
Modern Networks-on-Chip (NoC) have the capability to tolerate and adapt to the faults and failures i...
Due to the impact of ongoing deep sub-micron technology, billions of transistors are crammed in an i...
Networks on chip (NoCs) are a scalable interconnect solution for multiprocessor systems on chip. We ...
Packet-based on-chip interconnection networks, or Network-on-Chips (NoCs) are progressively replacin...
Networks on chip (NoCs) are a scalable interconnect solution for multiprocessor systems on chip. We ...
Abstract—The structural redundancy inherent to on-chip interconnection networks [networks on chip (N...
Due to recent progress in semiconductor technology, communication is becoming the major source of ex...
25th International Conference on Microelectronics (ICM), Beirut, LEBANON, DEC 15-18, 2013Internation...
In some application domains (e.g., mission-critical systems), proactive detection of reliability thr...
International audienceThe use of fault-tolerant mechanism is essential to ensure the correct functio...
The demands of future computing, as well as the challenges of nanometer-era VLSI design, will requir...
A new distributed on-line test mechanism for NoCs is proposed which scales to large-scale networks w...
A key requirement for modern Networks-on-Chip (NoC) is the ability to detect and diagnose faults and...
A key requirement for modern Networks-on-Chip (NoC) is the ability to detect and diagnose faults and...
Modern Networks-on-Chip (NoC) have the capability to tolerate and adapt to the faults and failures i...
Due to the impact of ongoing deep sub-micron technology, billions of transistors are crammed in an i...
Networks on chip (NoCs) are a scalable interconnect solution for multiprocessor systems on chip. We ...
Packet-based on-chip interconnection networks, or Network-on-Chips (NoCs) are progressively replacin...
Networks on chip (NoCs) are a scalable interconnect solution for multiprocessor systems on chip. We ...
Abstract—The structural redundancy inherent to on-chip interconnection networks [networks on chip (N...
Due to recent progress in semiconductor technology, communication is becoming the major source of ex...
25th International Conference on Microelectronics (ICM), Beirut, LEBANON, DEC 15-18, 2013Internation...
In some application domains (e.g., mission-critical systems), proactive detection of reliability thr...
International audienceThe use of fault-tolerant mechanism is essential to ensure the correct functio...
The demands of future computing, as well as the challenges of nanometer-era VLSI design, will requir...
A new distributed on-line test mechanism for NoCs is proposed which scales to large-scale networks w...