A key requirement for modern Networks-on-Chip (NoC) is the ability to detect and diagnose faults and failures. A novel approach is proposed which addresses the challenge of fault detection using an online mechanism. The approach minimises online intrusion by employing dynamic rates of testing to maximize NoC throughput while still ensuring sufficient testing. This is achieved using a novel Monitor Module based on the back-off algorithm. The paper presents results on the minimal impact on the intrusion of the NoC for a range of test conditions and also highlights the low area/power overheads for scalability
In some application domains (e.g., mission-critical systems), proactive detection of reliability thr...
International audienceThe use of fault-tolerant mechanism is essential to ensure the correct functio...
Abstract—The structural redundancy inherent to on-chip interconnection networks [networks on chip (N...
A key requirement for modern Networks-on-Chip (NoC) is the ability to detect and diagnose faults and...
A key requirement for modern Networks-on-Chip (NoC) is the ability to detect and diagnose faults and...
Modern Networks-on-Chip (NoC) have the capability to tolerate and adapt to the faults and failures i...
Due to the impact of ongoing deep sub-micron technology, billions of transistors are crammed in an i...
This paper presents efficient methods for online fault detection and diagnosis of Network-on-Chip (N...
This paper proposes a built-in self-test/self-diagnosis procedure at start-up of an on-chip network ...
Networks on chip (NoCs) are a scalable interconnect solution for multiprocessor systems on chip. We ...
Due to recent progress in semiconductor technology, communication is becoming the major source of ex...
In some application domains (e.g., mission-critical systems), proactive detection of reliability thr...
The demands of future computing, as well as the challenges of nanometer-era VLSI design, will requir...
Packet-based on-chip interconnection networks, or Network-on-Chips (NoCs) are progressively replacin...
In some application domains (e.g., mission-critical systems), proactive detection of reliability thr...
International audienceThe use of fault-tolerant mechanism is essential to ensure the correct functio...
Abstract—The structural redundancy inherent to on-chip interconnection networks [networks on chip (N...
A key requirement for modern Networks-on-Chip (NoC) is the ability to detect and diagnose faults and...
A key requirement for modern Networks-on-Chip (NoC) is the ability to detect and diagnose faults and...
Modern Networks-on-Chip (NoC) have the capability to tolerate and adapt to the faults and failures i...
Due to the impact of ongoing deep sub-micron technology, billions of transistors are crammed in an i...
This paper presents efficient methods for online fault detection and diagnosis of Network-on-Chip (N...
This paper proposes a built-in self-test/self-diagnosis procedure at start-up of an on-chip network ...
Networks on chip (NoCs) are a scalable interconnect solution for multiprocessor systems on chip. We ...
Due to recent progress in semiconductor technology, communication is becoming the major source of ex...
In some application domains (e.g., mission-critical systems), proactive detection of reliability thr...
The demands of future computing, as well as the challenges of nanometer-era VLSI design, will requir...
Packet-based on-chip interconnection networks, or Network-on-Chips (NoCs) are progressively replacin...
In some application domains (e.g., mission-critical systems), proactive detection of reliability thr...
International audienceThe use of fault-tolerant mechanism is essential to ensure the correct functio...
Abstract—The structural redundancy inherent to on-chip interconnection networks [networks on chip (N...