The use of Application Specific Instruction-set Processors (ASIP) is a solution to the problem of increasing complexity in embedded systems design. One of the major challenges in ASIP design is Design Space Exploration (DSE), because of the heterogeneity of the objectives and parameters involved. Typically DSE is a multi- objective search problem, where performance, power, area, etc. are the different optimization criteria. The output of a DSE strategy is a set of candidate design solutions called a Pareto-optimal set. Choosing a solution for system implementation from the Pareto- optimal set can be a difficult task, generally because Pareto-optimal sets can be extremely large or even contain an infinite number of solutions. In this paper w...
A Fuzzy Simulated Evolution algorithm is presented for multi-objetive minimization of VLSI cell plac...
VLSI standard cell placement is the process of arranging circuit components (modules) on a silicon l...
A fuzzy simulated evolution algorithm is presented for multi-objective minimization of VLSI cell pla...
A reduction in the time-to-market has led to widespread use of pre-designed parametric architectural...
Multi-objective evolutionary algorithms (MOEAs) have received increasing interest in industry becaus...
The use of Application Specific Instruction-set Proces-sors (ASIP) in embedded systems is a solution...
In this paper, we address the problem of the efficient exploration of the architectural design space...
In this paper, an algorithm for VLSI standard cell placement for low power and high performance desi...
In this paper, an algorithm for VLSI standard cell placement for low power and high performance desi...
In this paper, an algorithm for VLSI standard cell placement for low power and high performance desi...
The evaluation of the best system-level architecture in terms of energy and performance is of mainly...
Abstract. The evaluation of the best system-level architecture in terms of energy and performance is...
This chapter is dedicated to the optimization algorithms developed in the MULTICUBE project and to t...
This paper presents an automatic design space exploration using processor design knowledge for the m...
A Fuzzy Simulated Evolution algorithm is presented for multi-objetive minimization of VLSI cell plac...
VLSI standard cell placement is the process of arranging circuit components (modules) on a silicon l...
A fuzzy simulated evolution algorithm is presented for multi-objective minimization of VLSI cell pla...
A reduction in the time-to-market has led to widespread use of pre-designed parametric architectural...
Multi-objective evolutionary algorithms (MOEAs) have received increasing interest in industry becaus...
The use of Application Specific Instruction-set Proces-sors (ASIP) in embedded systems is a solution...
In this paper, we address the problem of the efficient exploration of the architectural design space...
In this paper, an algorithm for VLSI standard cell placement for low power and high performance desi...
In this paper, an algorithm for VLSI standard cell placement for low power and high performance desi...
In this paper, an algorithm for VLSI standard cell placement for low power and high performance desi...
The evaluation of the best system-level architecture in terms of energy and performance is of mainly...
Abstract. The evaluation of the best system-level architecture in terms of energy and performance is...
This chapter is dedicated to the optimization algorithms developed in the MULTICUBE project and to t...
This paper presents an automatic design space exploration using processor design knowledge for the m...
A Fuzzy Simulated Evolution algorithm is presented for multi-objetive minimization of VLSI cell plac...
VLSI standard cell placement is the process of arranging circuit components (modules) on a silicon l...
A fuzzy simulated evolution algorithm is presented for multi-objective minimization of VLSI cell pla...