Measurement-based timing analysis techniques increasingly rely on the Performance Monitoring Units (PMU) of MPSoCs, as these units implement specialized Hardware Event Monitors (HEMs) that convey detailed information about multicore interference in hardware shared resources. Unfortunately, there is an evident mismatch between the large number of HEMs (typically several hundreds) and the comparatively small number (normally less than ten) of Performance Monitoring Counters (PMCs) that can be configured to track HEMs in the PMU. Timing analysis normally require to observe a non-negligible number of HEMs per task from the same execution. However, due to the small number of PMCs, HEMs are necessarily collected across multiple runs that, despite...
Commercial Off-The-Shelf (COTS) processors are now commonly used in real-time embedded systems. The ...
Hardware performance counters are CPU registers that count data loads and stores, cache misses, and ...
With the upcoming shift from single-core to multicore COTS processors for safety critical products s...
The performance monitoring unit (PMU) in multiprocessor system-on-chips (MPSoCs) is at the heart of ...
The number of mechanical subsystems enhanced or completely replaced by electrical/electronic compone...
Performance Monitoring Units (PMUs) are at the heart of most-advanced timing analysis techniques to ...
International audienceThe aim of this paper is to present a high precision and event-versatile MBPTA...
Tasks running in MPSoCs experience contention delays when accessing MPSoC’s shared resources, compli...
This paper proposes a novel approach for scheduling n performance monitoring events onto m hardware ...
The trend toward the adoption of a multiprocessor system on a chip (MPSoC) in critical real-time dom...
The demand for increased computing performance is driving industry in critical-embedded systems (CES...
International audienceEstimating safe upper bounds on task execution times is required in the design...
Probabilistic Timing Analysis (PTA) in general and its measurement-based variant called MBPTA in par...
Commercial Off-The-Shelf (COTS) processors are now commonly used in real-time embedded systems. The ...
International audienceProbabilistic Timing Analysis (PTA) in general and its measurement-based varia...
Commercial Off-The-Shelf (COTS) processors are now commonly used in real-time embedded systems. The ...
Hardware performance counters are CPU registers that count data loads and stores, cache misses, and ...
With the upcoming shift from single-core to multicore COTS processors for safety critical products s...
The performance monitoring unit (PMU) in multiprocessor system-on-chips (MPSoCs) is at the heart of ...
The number of mechanical subsystems enhanced or completely replaced by electrical/electronic compone...
Performance Monitoring Units (PMUs) are at the heart of most-advanced timing analysis techniques to ...
International audienceThe aim of this paper is to present a high precision and event-versatile MBPTA...
Tasks running in MPSoCs experience contention delays when accessing MPSoC’s shared resources, compli...
This paper proposes a novel approach for scheduling n performance monitoring events onto m hardware ...
The trend toward the adoption of a multiprocessor system on a chip (MPSoC) in critical real-time dom...
The demand for increased computing performance is driving industry in critical-embedded systems (CES...
International audienceEstimating safe upper bounds on task execution times is required in the design...
Probabilistic Timing Analysis (PTA) in general and its measurement-based variant called MBPTA in par...
Commercial Off-The-Shelf (COTS) processors are now commonly used in real-time embedded systems. The ...
International audienceProbabilistic Timing Analysis (PTA) in general and its measurement-based varia...
Commercial Off-The-Shelf (COTS) processors are now commonly used in real-time embedded systems. The ...
Hardware performance counters are CPU registers that count data loads and stores, cache misses, and ...
With the upcoming shift from single-core to multicore COTS processors for safety critical products s...