Switched-current filters using bilinear integrators

The growing popularity of switched-current technology as a replacement for the well-established switched-capacitor technology has led to interest in exploring switched-current implementations of sampled-data functions, such as filtering. This thesis presents the design, implementation and measured results of a 5th-order switched-current Chebyshev filter. The filter's signal-flow-graph is derived from an LC ladder and is composed of basic building blocks of bilinear integrators. The design process by which this is achieved is the subject of one chapter. These bilinear integrators are based upon a novel switched-current integrator designed by the author. Using models from Northern Telecom's 1.2 $ mu$m CMOS4S process, simulation results of the filter, the novel switched-current integrator and its building block of switched-current memory cells will be shown and compared with the experimentally measured results