Embeddings of a cray T3D supercomputer onto a free-space optical backplane

The rapid increase in the demands for high bandwidth systems has motivated research in optoelectronic technologies and architectures. At McGill University, a five year five Major Project in Photonic Devices and Systems has been undertaken, with funding from the Canadian Institute for Telecommunications Research. One of the main goals of the project is to develop an optical backplane architecture capable of interconnecting several electronic printed circuit boards with an aggregate bandwidth on the order of 1 Terabit per second. Currently, the project is in its third year in which a representative subset of a Terabit Photonic Backplane is under development.The objectives of this thesis are three fold. First, we motivate the study of optical backplanes by demonstrating that the interconnection network of a Cray T3D Supercomputer can be embedded onto the optical backplane. In particular, we demonstrate that the 3D mesh interconnect of the Cray T3D can be embedded into the "Dual Stream Linear HyperPlane" (9). Secondly, having established a motivation we then provide a detailed review of the functional specifications of an optical backplane. In particular, we provide a detailed review of the June 1995 backplane design (31). Thirdly, having established a motivation and a detailed design we then develop a executable software model of the June 1995 backplane using the VHDL hardware description language. The VHDL model is used to establish the functional correctness of the design. In addition, the VHDL model is used to develop a real-time simulator for the photonic backplane using 4013 Field Programmable Gate Arrays (FPGAs). The real time simulator can operate at a 4 MHz clock rate and can be used to test other electronic components such as the Message-Processors at realistic clock rates. (Abstract shortened by UMI.