In this work, an efficient refinement scheme is proposed for interval calculation of GMM-based classification. The proposed refinement scheme reduces the circuit area and accelerates the throughput from the original. The proposed scheme consists of scaling for the exponential part and shifting of precalculated values of the fractional part. As a result, the refinement process can be constructed with a multiplierless architecture. An experimental implementation on FPGA shows that the proposed method reduces the circuit area under 52.2% and accelerates the throughput over 117.6% from the architecture with the original interval refinement process.APSIPA ASC 2009: Asia-Pacific Signal and Information Processing Association, 2009 Annual Summit an...