Investigation of vertical organic transistor geometries and materials for printable applications

The discovery of organic electronics has opened many new possibilities for electronic industries and systems. For organic field effect transistors (OFETs), many advantages, such as high flexibility, low-cost production and large area processing, can be used in many applications. Even though OFET cannot replace the conventional FET to lead the electronic industries, there are still many possibilities of OFET that conventional FET cannot approach. In transistor development, scaling down the devices has been the main challenge for a long time. By scaling down the size, transistors become faster, smaller, less power consumption, and are cheaper for fabrication. Shortening the channel of transistors is a main problem in reducing the device size. To address this, processing of a vertically structured OFET is a much easier way of shortening the channel length compared to using the ordinary lateral channel structure of OFET. In this thesis, two methods were used for processing vertically separated drain and source electrodes: one is the dry-etching method, and the other one is the oblique-incidence depositing method. Au as conducting material of drain and source electrodes, P3HT as semiconductor, PSSH as electrolyte, and the Ti/probe of FET station as gate material were chosen for the experiments. For insulating material, a polyvinylidene fluoride copolymer was used in dry-etching method and SU-8 photoresist was used in oblique-incidence depositing method. The channel length in this thesis depended on the thickness of the insulating layer. A channel of around 10 µm was processed using the dry-etching method with a yield of almost 95 percent and a channel smaller than 1 µm was processed using the oblique-incidence depositing method with a yield of around 80 percent