Add to ORKGIn this report we describe an adaptive simulated annealing method for sizing the devices in analog circuits. The motivation for use an adaptive simulated annealing method for analog circuit design are to increase the efficiency of the design circuit. To demonstrate the functionality and the performance of the approach, an operational transconductance amplifier is simulated. The circuit is modeled with symbolic equations that are derived automatically by a simulator
The synthesis of large digital integrated circuits is ubiquitous, highly developed, and efficient. D...
In this thesis a simulated annealing algorithm is employed as an optimization tool for a large scale...
Many signal processing applications pose optimization problems with multimodal and nonsmooth cost fu...
Today electronics becomes more and more complex and to keep low costs and power consumption, both di...
The goal of this paper is to present a tool for automatic sizing of analog basic integrated blocks u...
It is shown that using simulated annealing in combination with electrical simulation provides a powe...
The research presented in this paper is concerned with the design automation of analog integrated ci...
With several commercial tools becoming available, the high-level synthesis of applicationspeci c int...
Nonlinear functions can be approximated by the linear combination of base functions, which provides ...
This paper proposes a methodology for automatic synthesis of analog basic building blocks. The metho...
This master’s thesis deals with integrating simulations using Agilents Electronic Design Automation ...
This paper presents an improvement in usability and integrity of simulation-based analog circuit siz...
VLSI analog module placement problem is NP-complete, and both simulated Cauchy annealing and simulat...
In analogue circuit designs, an initial circuit topology is usually chosen with a set of parameters ...
In this paper, a tool based on free software to perform low level optimization on analog designs is ...
The synthesis of large digital integrated circuits is ubiquitous, highly developed, and efficient. D...
In this thesis a simulated annealing algorithm is employed as an optimization tool for a large scale...
Many signal processing applications pose optimization problems with multimodal and nonsmooth cost fu...
Today electronics becomes more and more complex and to keep low costs and power consumption, both di...
The goal of this paper is to present a tool for automatic sizing of analog basic integrated blocks u...
It is shown that using simulated annealing in combination with electrical simulation provides a powe...
The research presented in this paper is concerned with the design automation of analog integrated ci...
With several commercial tools becoming available, the high-level synthesis of applicationspeci c int...
Nonlinear functions can be approximated by the linear combination of base functions, which provides ...
This paper proposes a methodology for automatic synthesis of analog basic building blocks. The metho...
This master’s thesis deals with integrating simulations using Agilents Electronic Design Automation ...
This paper presents an improvement in usability and integrity of simulation-based analog circuit siz...
VLSI analog module placement problem is NP-complete, and both simulated Cauchy annealing and simulat...
In analogue circuit designs, an initial circuit topology is usually chosen with a set of parameters ...
In this paper, a tool based on free software to perform low level optimization on analog designs is ...
The synthesis of large digital integrated circuits is ubiquitous, highly developed, and efficient. D...
In this thesis a simulated annealing algorithm is employed as an optimization tool for a large scale...
Many signal processing applications pose optimization problems with multimodal and nonsmooth cost fu...