Embedded system design faces the HW/SW-partitioning problem often solved by explicit designer decisions. In this paper we describe a partitioning process on design specification analysis. Static and dynamic aspects influencing the overall time behaviour are examined during two analysis phases. Each phase evaluates a cost function classifying the suitability of the regarded partition for HW implementation. Furthermore costs of the HW/SW-interface are taken into account because this overhead is not neglectable. The analysis procedure is demonstrated by several benchmarks and reasonable results are pointed out. (orig.)SIGLEAvailable from TIB Hannover: RR 4683(1994,5) / FIZ - Fachinformationszzentrum Karlsruhe / TIB - Technische Informationsbib...