Add to ORKGAn important step of electronic image processing is edge detection. Within the scope of this Ph.D. thesis a microchip was developed and tested for this purpose. Realized in a complementary metal oxide semiconductor (CMOS) technology it is capable of handling images with a size of 66 x 66 pixels in a few microseconds. The processing is done in parallel by an analog network of special components which are combining the linear behavior of a resistor with the nonlinear one of a fuse. Those circuits, called resistive fuses, have been implemented in a way that is outstanding in terms of area usage and robustness against the unavoidable parameter fluctuations of semiconductor manufacturing processes. (orig.)SIGLEAvailable from TIB Hannover: RR 160...
This paper presents the theory behind a model for a two-stage analog network for edge detection an...
We present an analog VLSI cellular architecture implementing a simplified version of the Boundary Co...
In this paper a survey of analog application specific integrated circuits (ASICs) for low-level imag...
The resistive-fuse network is a well-known image segmen-tation processing model in which image edges...
In this paper we present an analog VLSI architecture that implements a neural network for image proc...
Edge detection is commonly used to extract important features of an image, while providing a compres...
In this paper a CMOS vision chip featuring real-time on-chip image processing capabilities is presen...
The article presents measurement results of prototype integrated circuits for acquisition and proces...
The article presents measurement results of prototype integrated circuits for acquisition and proces...
A prototype of a 34 x 34 pixel image sensor, implementing real-time analog image processing, is pres...
This paper presents a monolithic 128 x128 pixel optical sensor with analogue-to-digital converters, ...
This thesis focuses at first the basics of the field integrated image sensor systems in CMOS technol...
Abstract—This paper presents a massively parallel processing array designed for the 0.13µm 1.5V stan...
Abstract Today performance and operational efficiency of computer systems on digital image processin...
Abstract − This paper describes an analogue processing element (APE) suitable for high-density image...
This paper presents the theory behind a model for a two-stage analog network for edge detection an...
We present an analog VLSI cellular architecture implementing a simplified version of the Boundary Co...
In this paper a survey of analog application specific integrated circuits (ASICs) for low-level imag...
The resistive-fuse network is a well-known image segmen-tation processing model in which image edges...
In this paper we present an analog VLSI architecture that implements a neural network for image proc...
Edge detection is commonly used to extract important features of an image, while providing a compres...
In this paper a CMOS vision chip featuring real-time on-chip image processing capabilities is presen...
The article presents measurement results of prototype integrated circuits for acquisition and proces...
The article presents measurement results of prototype integrated circuits for acquisition and proces...
A prototype of a 34 x 34 pixel image sensor, implementing real-time analog image processing, is pres...
This paper presents a monolithic 128 x128 pixel optical sensor with analogue-to-digital converters, ...
This thesis focuses at first the basics of the field integrated image sensor systems in CMOS technol...
Abstract—This paper presents a massively parallel processing array designed for the 0.13µm 1.5V stan...
Abstract Today performance and operational efficiency of computer systems on digital image processin...
Abstract − This paper describes an analogue processing element (APE) suitable for high-density image...
This paper presents the theory behind a model for a two-stage analog network for edge detection an...
We present an analog VLSI cellular architecture implementing a simplified version of the Boundary Co...
In this paper a survey of analog application specific integrated circuits (ASICs) for low-level imag...