Increasing demands for faster switching frequencies require high current drives and consequently high Ge contents for Si_1_-_xGe_x hetero-MOSFETs. In addition, highly planar interfaces are a prerequisite for the successful incorporation of a Si_1_-_xGe_x layer into a Si CMOS technology, with stringent constraints being placed on layer thicknesses. The influence of MBE growth temperature has been investigated in order to kinetically suppress strain induced interface roughening associated with high Ge contents (x#>=#0.3). However, it has been shown that simply reducing the growth temperature leads to highly defected layers on the atomic scale (evidenced from PAS and low temperature Hall measurements). A two-stage growth technique has been ...
Silicon Germanium (Si1-xGex) is an alloy semiconductor that has caught considerable attention of the...
Biaxial tensile strained Si grown on SiGe virtual substrates will be incorporated into future genera...
Performance scaling of CMOS technologies beyond the 22 nm node will depend on the successful introdu...
Si/Si0.64Ge0.36/Si heterostructures have been grown at low temperature (450 degrees C) to avoid the ...
The influence of lateral dimensions on the relaxation mechanism and the resulting effect on the surf...
Recently, the best 65 nm Ge p-channel metal-oxide-semiconductor field-effect transistor (pMOSFET) pe...
Strained SiGe heterostructures possess transport properties superior to Si. Their integration in the...
Heteroepitaxy techniques for the growth of group IV binary alloys, in particular, SiGe, SiC, GeC and...
Heteroepitaxial SiGe(C) layers have attracted immense attention as a material for performance boost ...
The growth of Si1-xGex quantum wells with high Ge composition (x>0.5) on Si(001) substrates by MBE i...
The objective of this work is to provide an understanding of the growth and structural characteristi...
Ge/Si1-xGex inverted modulation doped heterostructures with Ge channel thickness of 16 and 20 nm wer...
Epitaxial layers of SiGe(C) have entered mainstream Si processing-forming base regions in heterojunc...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, ...
This paper reports on detailed materials and electrical characterization of strain-compensated Si1?x...
Silicon Germanium (Si1-xGex) is an alloy semiconductor that has caught considerable attention of the...
Biaxial tensile strained Si grown on SiGe virtual substrates will be incorporated into future genera...
Performance scaling of CMOS technologies beyond the 22 nm node will depend on the successful introdu...
Si/Si0.64Ge0.36/Si heterostructures have been grown at low temperature (450 degrees C) to avoid the ...
The influence of lateral dimensions on the relaxation mechanism and the resulting effect on the surf...
Recently, the best 65 nm Ge p-channel metal-oxide-semiconductor field-effect transistor (pMOSFET) pe...
Strained SiGe heterostructures possess transport properties superior to Si. Their integration in the...
Heteroepitaxy techniques for the growth of group IV binary alloys, in particular, SiGe, SiC, GeC and...
Heteroepitaxial SiGe(C) layers have attracted immense attention as a material for performance boost ...
The growth of Si1-xGex quantum wells with high Ge composition (x>0.5) on Si(001) substrates by MBE i...
The objective of this work is to provide an understanding of the growth and structural characteristi...
Ge/Si1-xGex inverted modulation doped heterostructures with Ge channel thickness of 16 and 20 nm wer...
Epitaxial layers of SiGe(C) have entered mainstream Si processing-forming base regions in heterojunc...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, ...
This paper reports on detailed materials and electrical characterization of strain-compensated Si1?x...
Silicon Germanium (Si1-xGex) is an alloy semiconductor that has caught considerable attention of the...
Biaxial tensile strained Si grown on SiGe virtual substrates will be incorporated into future genera...
Performance scaling of CMOS technologies beyond the 22 nm node will depend on the successful introdu...