Wafer scale conformality using Lateral High Aspect Ratio test structures

The development of the conformal thin film process is at high importance, especially in 3D memory applications. High aspect ratio structures, new materials, and demanding geometries are challenges for the tool manufacturers, material developers, and in inspection and testing.PillarHall® Lateral High Aspect Ratio (LHAR) silicon test chip has proven its value in conformality metrology and elemental mapping of the trench wall [1-5] where single chip on the center of a carrier has been a typical approach. Here, we examined the PillarHall® test chip compatibility to wafer level conformality mapping using specially designed PillarHall® LHAR4 small chips, on a 150-mm wafer scale with a silicon-based chip holder to enable attachment of multiple chips on a selected wafer locations. Studied process was Al2O3 made by ALD at 300 °C using 500 cycles in Picosun R-150 ALD reactor with variable pulse-purgesequences. Chips were stabilized in the process chamber for 30 minutes at ALD temperature, before the process was started. The film thickness was measured with spectroscopic reflectometry SCI FilmTek 2000M using 49 pts and 100 pts measurement for full wafer and for the LHAR4 chip, respectively. The film thickness on planar surface, 150-mm wafer was 47.3±0.2 nm which was in-line with the film thicknesses measured from opening of the LHAR4 chips, varying from 45.8 to 48.3 nm. The half thickness penetration depth, PD50% varied a from 184 to 232. The reason and repeatability for the variation in the PD50% across the 150-mm wafer are still unconfirmed and can be e.g. due to small gradients in temperature and pressure, and precursor flow designs in the reactor system. Although reasons of conformality variations at wafer level are not well-known, PillarHall® provides information of the minimum reachable aspect ratio. This information can be used to develop experimentally process parameters forspecific aspect ratio requirements for the full wafer area. Furthermore, the resented platform enables easy and fast methodology to improve understanding of the factors influencing on the wafer level conformality