Harmonic Distortion Reduction using Seven level H-Bridge VSI Topology based Dynamic Voltage Restorer

This paper demos the model, the control and simulation of H-Bridge VSI topology based Dynamic Voltage Restorer (DVR). The structure and the operating principle of the Cascaded H-Bridge Seven level Inverter is realized. The phase shifted SPWM was adapted to reduce the lower order harmonics of the output voltage. The controller was based on the dqo transformation. The performance of the proposed method was ascertained in PSCAD. The simulation results are appraised and discussed. The controller was able to manage the zero-sequence voltage during unbalance fault period. The phase shift SPWM was incorporated with low frequency and subsequently, the switching loss was low. The Total Harmonic Distortion (THD) with the designed DVR was significantly was low in comparison to other traditional models and was within the IEEE Standards 519-2014. The envisioned controller algorithm provides excellent voltage improvements