International audienceThe current technological challenge for computing systems is to use multicore processors in order to ensure reliability, improve performance, and reduce power consumption. This paper presents a method and preliminary results of SEU fault-injection campaigns performed on multicore systems in asymmetric multi-processing mode. The target used for this purpose was a Quad-core processor. This work aims at validating the efficiency of TMR fault-tolerance method and to show the weakest variables of a given application running over multicore systems
This paper makes a case for using multi-core processors to simultaneously achieve transient-fault to...
ISBN : 978-1-4244-1665-3International audienceThis paper deals with the prediction of SEU error rate...
The current trend in commercial processors is producing multi-core architectures which pose both an ...
International audienceThe current technological challenge for computing systems is to use multicore ...
International audienceThe widespread use of multicore processors in computing systems and the impera...
Multicore processors are becoming more and more attractive in embedded and safety-critical domains b...
International audienceDevelopment trends for computing platforms moved from increasing the frequency...
International audienceThis paper describes two different but complementary approaches that can be us...
This paper presents a detailed analysis of the behavior of a novel fault-tolerant 32-bit embedded CP...
Abstract—An approach to study the effects of single event upsets (SEU) by fault injection performed ...
Increased technology scaling not only resulted in a performance increase of the microprocessor, but ...
11th Euromicro Conference on Digital System Design : Parma, Italy : Sep 3-5, 2008While shrinking geo...
International audienceThis paper presents a new fault injection method based on the CEU (Code Emulat...
In this dissertation we address the overhead reduction of fault tolerance (FT) techniques. Due to te...
International audienceThis work evaluates the error-rate of a memorybound application implemented in...
This paper makes a case for using multi-core processors to simultaneously achieve transient-fault to...
ISBN : 978-1-4244-1665-3International audienceThis paper deals with the prediction of SEU error rate...
The current trend in commercial processors is producing multi-core architectures which pose both an ...
International audienceThe current technological challenge for computing systems is to use multicore ...
International audienceThe widespread use of multicore processors in computing systems and the impera...
Multicore processors are becoming more and more attractive in embedded and safety-critical domains b...
International audienceDevelopment trends for computing platforms moved from increasing the frequency...
International audienceThis paper describes two different but complementary approaches that can be us...
This paper presents a detailed analysis of the behavior of a novel fault-tolerant 32-bit embedded CP...
Abstract—An approach to study the effects of single event upsets (SEU) by fault injection performed ...
Increased technology scaling not only resulted in a performance increase of the microprocessor, but ...
11th Euromicro Conference on Digital System Design : Parma, Italy : Sep 3-5, 2008While shrinking geo...
International audienceThis paper presents a new fault injection method based on the CEU (Code Emulat...
In this dissertation we address the overhead reduction of fault tolerance (FT) techniques. Due to te...
International audienceThis work evaluates the error-rate of a memorybound application implemented in...
This paper makes a case for using multi-core processors to simultaneously achieve transient-fault to...
ISBN : 978-1-4244-1665-3International audienceThis paper deals with the prediction of SEU error rate...
The current trend in commercial processors is producing multi-core architectures which pose both an ...