International audienceComputer system and network performance can be significantly improved by caching frequently used information. When the cache size is limited, the cache replacement algorithm has an important impact on the effectiveness of caching. In this paper we introduce time-to-live (TTL) approximations to determine the cache hit probability of two classes of cache replacement algorithms: h-LRU and LRU(m). These approximations only require the requests to be generated according to a general Markovian arrival process (MAP). This includes phase-type renewal processes and the IRM model as special cases. We provide both numerical and theoretical support for the claim that the proposed TTL approximations are asymptotically exact. In par...
Abstract Hard real-time systems must obey strict timing constraints. Therefore, one needs to derive ...
TTL caching models have recently regained significant research interest due to their connection to p...
Time-to-Live (TTL) caches decouple the occupancy of objects in cache through object-specific validit...
International audienceComputer system and network performance can be significantly improved by cachi...
International audienceComputer system and network performance can be significantly improved by cachi...
International audienceThere has been considerable research on the performance analysis of on-demand ...
Many researchers have been working on the performance analysis of caching in Information-Centric Net...
International audienceIn this paper we study the performance of a family of cache replacement algori...
International audienceThe modeling and analysis of an LRU cache is extremely challenging as exact re...
Because caching is a pervasive technology in modern computing and networks, characterizing the perfo...
Caches are segments of memory that store requested information in a system subject to a set of decis...
Abstract—Due to the omnipresence of caching in modern computing and networks, characterizing the per...
In a 2002 paper, Che and co-authors proposed a simple approach for estimating the hit rates of a cac...
RR-7883 : http://hal.inria.fr/hal-00676735/International audienceMany researchers have been working ...
Abstract — This paper presents a way of modeling the hit rates of caches that use a time-to-live (TT...
Abstract Hard real-time systems must obey strict timing constraints. Therefore, one needs to derive ...
TTL caching models have recently regained significant research interest due to their connection to p...
Time-to-Live (TTL) caches decouple the occupancy of objects in cache through object-specific validit...
International audienceComputer system and network performance can be significantly improved by cachi...
International audienceComputer system and network performance can be significantly improved by cachi...
International audienceThere has been considerable research on the performance analysis of on-demand ...
Many researchers have been working on the performance analysis of caching in Information-Centric Net...
International audienceIn this paper we study the performance of a family of cache replacement algori...
International audienceThe modeling and analysis of an LRU cache is extremely challenging as exact re...
Because caching is a pervasive technology in modern computing and networks, characterizing the perfo...
Caches are segments of memory that store requested information in a system subject to a set of decis...
Abstract—Due to the omnipresence of caching in modern computing and networks, characterizing the per...
In a 2002 paper, Che and co-authors proposed a simple approach for estimating the hit rates of a cac...
RR-7883 : http://hal.inria.fr/hal-00676735/International audienceMany researchers have been working ...
Abstract — This paper presents a way of modeling the hit rates of caches that use a time-to-live (TT...
Abstract Hard real-time systems must obey strict timing constraints. Therefore, one needs to derive ...
TTL caching models have recently regained significant research interest due to their connection to p...
Time-to-Live (TTL) caches decouple the occupancy of objects in cache through object-specific validit...