International audienceIn this paper, a 200 nm n-channel inversion-type self-aligned In 0.53 Ga 0.47 As MOSFET with a Al 2 O 3 gate oxide deposited by Atomic Layer Deposition (ALD) is demonstrated. Two ion implantation processes using silicon nitride side-wall are performed for the fabrication of the n-type source and drain regions. The 200 nm gate-length MOSFET with a gate oxide thickness of 8 nm features the transconductance of 70 mS/mm and the maximum drain current of 200 mA/mm
Currently, the established large area technology is amorphous silicon where device performance is sa...
High-performance inversion-type enhancement-mode n-channel In0.65Ga0.35As metal-oxide-semiconductor ...
InGaAs n-channel metal oxide semiconductor field-effect transistors (MOSFETs) were fabricated on ger...
International audienceIn this paper, a 200 nm n-channel inversion-type self-aligned In 0.53 Ga 0.47 ...
In this paper we present a 55 nm gate length In0.53Ga0.47As MOSFET with extrinsic transconductance o...
III-V MOSFETs are currently being considered as a candidate for future high performance transistors ...
A multi-gate n-type In0.53Ga0.47As MOSFET is fabricated using gate-first self-aligned method and air...
We have developed a self-aligned L-g = 55 nm In-0.53 Ga-0.47 As MOSFET incorporating metal-organic c...
We report the experimental demonstration of deep-submicrometer inversion-mode In0.75Ga0.25As MOSFETs...
This article describes a process flow that has enabled the first demonstration of functional, fully ...
We report the first demonstration of self-aligned gate (SAG) β-Ga2O3 metal-oxide-semiconductor field...
High-performance inversion-type enhancementmode (E-mode) n-channel In0.65Ga0.35As MOSFETs with atomi...
AbstractIn this paper, we investigate the scaling and carrier transport behavior of sub-100nm In0.7G...
As the Si CMOS roadmap for scaling approaches its fundamental physics limits, alternatives have been...
A new process flow to realize the ideal self-aligned double-gate (DG) MOSFET was designed. The ideal...
Currently, the established large area technology is amorphous silicon where device performance is sa...
High-performance inversion-type enhancement-mode n-channel In0.65Ga0.35As metal-oxide-semiconductor ...
InGaAs n-channel metal oxide semiconductor field-effect transistors (MOSFETs) were fabricated on ger...
International audienceIn this paper, a 200 nm n-channel inversion-type self-aligned In 0.53 Ga 0.47 ...
In this paper we present a 55 nm gate length In0.53Ga0.47As MOSFET with extrinsic transconductance o...
III-V MOSFETs are currently being considered as a candidate for future high performance transistors ...
A multi-gate n-type In0.53Ga0.47As MOSFET is fabricated using gate-first self-aligned method and air...
We have developed a self-aligned L-g = 55 nm In-0.53 Ga-0.47 As MOSFET incorporating metal-organic c...
We report the experimental demonstration of deep-submicrometer inversion-mode In0.75Ga0.25As MOSFETs...
This article describes a process flow that has enabled the first demonstration of functional, fully ...
We report the first demonstration of self-aligned gate (SAG) β-Ga2O3 metal-oxide-semiconductor field...
High-performance inversion-type enhancementmode (E-mode) n-channel In0.65Ga0.35As MOSFETs with atomi...
AbstractIn this paper, we investigate the scaling and carrier transport behavior of sub-100nm In0.7G...
As the Si CMOS roadmap for scaling approaches its fundamental physics limits, alternatives have been...
A new process flow to realize the ideal self-aligned double-gate (DG) MOSFET was designed. The ideal...
Currently, the established large area technology is amorphous silicon where device performance is sa...
High-performance inversion-type enhancement-mode n-channel In0.65Ga0.35As metal-oxide-semiconductor ...
InGaAs n-channel metal oxide semiconductor field-effect transistors (MOSFETs) were fabricated on ger...