Studying generation modes of linearized artificial neurons based on FPGA architecture hardware implementation

This paper describes the development of embedded software for the implementation and testing of the artificial multistable neuron model’s basic behavior with the help of the hardware architecture of programmable logic integrated circuits (FPGA). The real behavior and function of the biological neuron with linearized activation characteristics are investigated and implemented in the programming language VHD. The base model is a three-stable neuron with three asymmetric dendrites. To develop a hardware model, a computational mathematical model of a neuron is used, based on which a corresponding discrete model is synthesized. The model consists of the following modules: an input block, a timer, a clock generator, a threshold element, and an output signal generator. It is shown that the implemented system allows synthesizing a neural model with a predetermined number of stable discrete states, with the neuron changing its stable state depending on the input vector. Each stable state corresponds to the output function of the neuron. The developed model of artificial neurons was implemented on the DIGILENT BASYS II SPARTAN-3E XC3S100E FPGA kit in the WebPACKTM ISE 13.3 environment. Resulting neuron output generation modes relation from input sequences and structure parameters were studied. The results of the work allow investigating high-speed neural networks with a dynamic structure using FPGA, which can be used for a wide range of modern tasks such as recognition, classification of patterns and development of elements of artificial intelligence