This paper proposes a method to construct a set of proof obligations from the architectural specification of a concurrent system. The architectural specifications used express correctness requirements of a concurrent system at a high level without any reference to component functionality. Then the proof obligations derived from such specifications are discharged as model checking tasks in a suitable behavioral model where components are assigned their respective functionalities. An experimental extension to the SPIN tool is used as the model checker. The block diagram notation used to specify architectures allows interchangeable components with equivalent intended functionalities to be encapsulated within a representative module. A proof ob...
© 2015 Published by Elsevier B.V.The specification of a concurrent program module is a difficult pro...
Abstract—VLSI systems are commonly specified using sequential exe-cutable functional specifications,...
Modern multiprocessors and microprocesseurs implement weak or relaxed memory models, in which the ap...
This paper proposes a method for the derivation of proof obligations from architectural specificatio...
A case study in formal verification of concurrent/distributed software is presented. The study conce...
. We propose a specification language for shared-variable concurrent programs based on Morgan's...
An integration of deductive verification and model checking have been investigated in numerous works...
Les multiprocesseurs et microprocesseurs multicœurs modernes mettent en oeuvre des modèles mémoires ...
The notions of serializability, linearizability and sequential consistency are used in the specifica...
A process for rigorous inspection of concurrent systems using tabular specification was developed an...
In this document we present intermediate results of our ongoing work in the field of the formal spec...
The specification of a concurrent program module is a difficult problem. The specifications must be ...
AbstractDistributed and concurrent object-oriented systems are difficult to analyze due to the compl...
This paper presents a proof technique for proving refinements for general state-based models of conc...
During its lifetime, embedded systems go through multi-ple changes to their runtime architecture. Th...
© 2015 Published by Elsevier B.V.The specification of a concurrent program module is a difficult pro...
Abstract—VLSI systems are commonly specified using sequential exe-cutable functional specifications,...
Modern multiprocessors and microprocesseurs implement weak or relaxed memory models, in which the ap...
This paper proposes a method for the derivation of proof obligations from architectural specificatio...
A case study in formal verification of concurrent/distributed software is presented. The study conce...
. We propose a specification language for shared-variable concurrent programs based on Morgan's...
An integration of deductive verification and model checking have been investigated in numerous works...
Les multiprocesseurs et microprocesseurs multicœurs modernes mettent en oeuvre des modèles mémoires ...
The notions of serializability, linearizability and sequential consistency are used in the specifica...
A process for rigorous inspection of concurrent systems using tabular specification was developed an...
In this document we present intermediate results of our ongoing work in the field of the formal spec...
The specification of a concurrent program module is a difficult problem. The specifications must be ...
AbstractDistributed and concurrent object-oriented systems are difficult to analyze due to the compl...
This paper presents a proof technique for proving refinements for general state-based models of conc...
During its lifetime, embedded systems go through multi-ple changes to their runtime architecture. Th...
© 2015 Published by Elsevier B.V.The specification of a concurrent program module is a difficult pro...
Abstract—VLSI systems are commonly specified using sequential exe-cutable functional specifications,...
Modern multiprocessors and microprocesseurs implement weak or relaxed memory models, in which the ap...