A fast approach based on augmented Lagrangian methods (ALMs) is proposed to solve the inverse imaging problem in optical lithography, known as inverse lithography technology. We develop a constrained optimization framework where the objective function includes a data-fidelity term and a binary equality constraint. We show how optimal solutions are reached with less execution time by applying the quasi-Newton method to the sub-problem. The proposed scheme also includes a tentative penalty parameter schedule for adjustment and control. Simulation results are compared with existing source-mask optimization (SMO) to illustrate the performance improvement in terms of pattern fidelity, convergence rate and process window size. Copyright © 2013 by...
For semiconductor manufacturers moving toward advanced technology nodes –32nm, 22nm and below – lith...
Optical lithography is facing a great challenge from the continuous shrinkage of industry node towar...
The continual shrinkage of minimum feature size in inte-grated circuit (IC) fabrication incurs more ...
With the development and production of integrated circuits at the 22nm node, optical lithography fac...
We present a novel optimisation algorithm for inverse lithography, based on optimization of the mask...
Abstract—An efficient algorithm based on the pixel-based mask representation is proposed for fast sy...
Lithography techniques have long been the driving power for the advancement of Moore’s law for the s...
Abstract. Inverse lithography technology formulates the photomask synthesis as an inverse mathematic...
An efficient algorithm is proposed for fast synthesis of low complexity model-based inverse lithogra...
As lithography still pushing toward to low-k1 region, resolution enhancement techniques (RETs) inclu...
IEEE International Conference on Image ProcessingThe continual shrinkage of minimum feature size in ...
A robust pixel-based simultaneous source and mask optimization (SMO) method is proposed. A three dim...
Inverse lithography technology formulates the photomask synthesis as an inverse mathematical problem...
We propose an alternating direction method of multipliers (ADMM) to solve an optimization problem st...
Optical lithography is a critical step in the semiconductor manufacturing process, and one key probl...
For semiconductor manufacturers moving toward advanced technology nodes –32nm, 22nm and below – lith...
Optical lithography is facing a great challenge from the continuous shrinkage of industry node towar...
The continual shrinkage of minimum feature size in inte-grated circuit (IC) fabrication incurs more ...
With the development and production of integrated circuits at the 22nm node, optical lithography fac...
We present a novel optimisation algorithm for inverse lithography, based on optimization of the mask...
Abstract—An efficient algorithm based on the pixel-based mask representation is proposed for fast sy...
Lithography techniques have long been the driving power for the advancement of Moore’s law for the s...
Abstract. Inverse lithography technology formulates the photomask synthesis as an inverse mathematic...
An efficient algorithm is proposed for fast synthesis of low complexity model-based inverse lithogra...
As lithography still pushing toward to low-k1 region, resolution enhancement techniques (RETs) inclu...
IEEE International Conference on Image ProcessingThe continual shrinkage of minimum feature size in ...
A robust pixel-based simultaneous source and mask optimization (SMO) method is proposed. A three dim...
Inverse lithography technology formulates the photomask synthesis as an inverse mathematical problem...
We propose an alternating direction method of multipliers (ADMM) to solve an optimization problem st...
Optical lithography is a critical step in the semiconductor manufacturing process, and one key probl...
For semiconductor manufacturers moving toward advanced technology nodes –32nm, 22nm and below – lith...
Optical lithography is facing a great challenge from the continuous shrinkage of industry node towar...
The continual shrinkage of minimum feature size in inte-grated circuit (IC) fabrication incurs more ...