Head-of-line (HOL) blocking limits the throughput of an input-buffered unicast switch to 0.586. This becomes even more serious for multicast packet switches. In this paper, a packet scheduling algorithm for multicast switches, called Contention-Based Ordering (CBO) algorithm, is proposed. Unlike conventional scheduling algorithms, CBO aims at maximizing the throughput measured at switch output ports, minimizing mean output packet delay, and maintaining a fair access for packets with different fan-outs. To achieve these, a packet compatibility matrix is used to provide the information on packet output contentions. Based on it, the CBO algorithm schedules the packets with the highest contention with others first. The performance of CBO is com...
Intensive studies have been conducted to identify the most suitable architecture for high-performanc...
Scheduling multicast traffic in input-queued switches to maximize throughput requires solving a hard...
In modern packet switches, technology limitations may introduce switch config-uration delays that ar...
An input buffered packet switch called the odd-even multicast switch is proposed. The packet splitti...
Abstract-- High performance packet switches frequently use a centralized scheduler (also known as an...
The paper studies input-queued packet switches loaded with both unicast and multicast traffic. The p...
The past few years have seen increasing interest in arbitrary topology cell-based local area network...
[[abstract]]We propose an efficient multicast cell-scheduling algorithm, called multiple-slot cell-s...
[[abstract]]We propose an efficient multicast cell-scheduling algorithm, called multiple-slot cell-s...
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer S...
[[abstract]]We propose an efficient multicast cell-scheduling algorithm, called multiple-slot cell-s...
Packet switching fabrics constitute a fundamental building block of all Internet routers. As a core ...
[[abstract]]A multicast cell scheduling algorithm with input queue is proposed in ATM multicast swit...
Abstract — The input-queued switch architecture is widely used in Internet routers, due to its abili...
In a packet switching system, arriving packets have variable lengths. They are segmented into fixed ...
Intensive studies have been conducted to identify the most suitable architecture for high-performanc...
Scheduling multicast traffic in input-queued switches to maximize throughput requires solving a hard...
In modern packet switches, technology limitations may introduce switch config-uration delays that ar...
An input buffered packet switch called the odd-even multicast switch is proposed. The packet splitti...
Abstract-- High performance packet switches frequently use a centralized scheduler (also known as an...
The paper studies input-queued packet switches loaded with both unicast and multicast traffic. The p...
The past few years have seen increasing interest in arbitrary topology cell-based local area network...
[[abstract]]We propose an efficient multicast cell-scheduling algorithm, called multiple-slot cell-s...
[[abstract]]We propose an efficient multicast cell-scheduling algorithm, called multiple-slot cell-s...
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer S...
[[abstract]]We propose an efficient multicast cell-scheduling algorithm, called multiple-slot cell-s...
Packet switching fabrics constitute a fundamental building block of all Internet routers. As a core ...
[[abstract]]A multicast cell scheduling algorithm with input queue is proposed in ATM multicast swit...
Abstract — The input-queued switch architecture is widely used in Internet routers, due to its abili...
In a packet switching system, arriving packets have variable lengths. They are segmented into fixed ...
Intensive studies have been conducted to identify the most suitable architecture for high-performanc...
Scheduling multicast traffic in input-queued switches to maximize throughput requires solving a hard...
In modern packet switches, technology limitations may introduce switch config-uration delays that ar...