A Sampling Microarchitecture Simulator for Java Workloads

Workshop on Tools, Infrastructures and Methodologies for the Evaluation of Research Systems (TIMERS-1) held in conjunction with the International Symposium on Performance Analysis of Systems and Software (ISPASS-2008) : April 20-22, 2008 : Austin, TexasJava has found widespread adoption across a variety of architectures. Understanding Java application behavior and further design and development of Java systems can be facilitated by software based microarchitecture simulators. However, the use of cycle-accurate, user-mode, software microarchitecture simulators in Java characterization studies are scarce and can be attributed to the following reasons: (1) simulating Java applications require the simulator to implement additional features necessary to support the Java runtime which allows dynamic compilation, thread scheduling and garbage collection, (2) the lack of such a simulator validated against actual hardware and its inability to support contemporary Java applications, (3) the complexity of Java applications and the intricate hardware that needs to be modelled result in impractically long simulation time for a single full run of the application, in turn adversely affecting the design and development time for Java-based systems. This paper seeks to address the impediments highlighted above. We enhance the dynamic simplescalar (DSS) simulator to support contemporary Java benchmark workloads. DSS is an out of order superscalar simulator for the PowerPC instruction set architecture and implements features required to support the Java runtime. In order to mitigate simulation time with minimal loss of accuracy, we implement statistical simulation sampling in the DSS simulator. We employ systematic sampling to measure in detail, only a small portion of the entire application being simulated. The application of established statistical sampling techniques allows us to evaluate performance parameters to the desired accuracy and allows us to attribute confidence levels to our estimates of performance. Finally, we validate our enhanced simulator against actual PowerPC hardware using its on-chip performance monitoring unit. Results show that our implementation of statistical sampling in DSS is able to track actual machine performance and achieves an average speedup of over 12x when simulating Java applications. Our validated simulator should help system designers accelerate microarchitecture design space exploration of Java applications