Datarol-II: A fine-grain massively parallel architecture

PARLE\u2794 Parallel Architectures and Languages Europe : 6th International PARLE Conference Athens, Greece, July 4-8, 1994In this paper, we introduce the Datarol-II processor, that can efficiently execute a fine-grain multi-thread program, called Datarol. In order to achieve the efficient multi-thread execution by reducing context switching overhead, we introduce an implicit register load/store mechanism in the execution pipeline. A two-level hierarchical memory system is also introduced in order to reduce memory access latency. The simulation results show that the Datarol-II processor can tolerate remote memory access latencies and execute a fine-grain multi-thread program efficiently