Fabrication, Field Emission Properties and Theoretical Simulation of Triode-Type Carbon Nanotube Emitter Arrays

Carbon nanotubes exhibit excellent field emission properties and will likely be prime candidates as electron sources in future vacuum electronic applications. Recent research has focused on enhancing field emission from traditional diode-type emitters by adding a gate electrode between the anode and the cathode. Since the gate to cathode (emitter) distance in this triode-type structure is small relative to the anode to cathode distance, this structure allows relatively small gate voltages to significantly enhance or dampen field emission. The key challenge for this research is: synthesizing vertically aligned carbon nanotube field emitters inside arrays of triode-type devices. The most common top-down , etch-deposit-synthesis method of synthesizing carbon nanotubes inside gated cavities is discussed here, and a novel bottom-up method is presented. This new approach bypasses the lithography and wet chemistry essential to the etch-deposit-synthesis method, instead using a dual-beam focused ion beam (FIB) system to mill cavities into a multi-layered substrate. Here the substrate is designed such that the act of milling a hole simultaneously creates the gate structure and exposes the catalyst from which carbon nanotubes can then be grown. Carbon nanotubes are synthesized using plasma enhanced chemical vapor deposition (PECVD) rather than thermal chemical vapor deposition, due to the superior alignment of the PECVD growth. As dual-beam FIB and PECVD can both be largely computerized, this synthesis method is highly reproducible. The dual-beam FIB also permits a high degree of controllability in gate radius, cavity depth and emitter spacing. The effects of a host of PECVD growth parameters (initial catalyst thickness, gas concentration, growth temperature, temperature ramping rate, chamber pressure, and plasma voltage) were characterized so that the morphology of the carbon nanotube emitters could be controlled as well. This bottom-up method is employed to construct functional, large area carbon nanotube field emitter arrays (CNT FEAs). The role of the gate layer in field emission is examined experimentally as well as through theoretical models. Field emission testing revealed that increasing gate voltage by as little as 0.3 V had significant impact on the local electric fields, lowering the turn-on and threshold fields by 3.6 and 3.0 V/µm, respectively, and increasing the field enhancement factor from 149 to 222. A quantum mechanical model of such triode-type field emission indicates that the local electric field generated by a negatively or positively biased gate directly impacts the tunneling barrier thickness and thus the achievable emission current. However, the geometry of triode-type devices (gate height, gate radius, emitter density) can influence the degree to which the gate voltage influences field emission. I demonstrate here an effective method of analytically calculating the effect of various such geometric parameters on the field emission. Results show that gate type (the height of the gate relative the emitter tip) can significantly impact the local electric field and hence the type of applications a device is suitable for. Side gates (gate height \u3c emitter height) induced the highest local electric field, while top gates (gate height \u3e emitter height) provided the greatest controllability. For all gate types, increasing the size of the gate opening increased the local electric field by diminishing the gate-emitter screening effect. However, gate voltages were able to enhance or inhibit the local electric field much more readily with smaller gate radii. Due to the strength of gate-emitter field screening in the triode-type structure, the spacing between emitters had virtually no impact on the local electric field, allowing relatively high emitter densities. These theoretical results, combined with a highly controllable synthesis method, provide valuable information and methodology for those designing and optimizing triode-type devices targeted at specific applications