High Efficiency Class E Microwave Frequency Multipliers

A novel design methodology for the successful implementation of high efficiency class E frequency multipliers is presented in this work. An innovative class E configuration is proposed for a frequency tripler that provides an advantage over the conventional designs, by allowing a 50 %duty cycle drive with a realisable load for 100 %DC-to-RF efficiency operation. A novel quantitative analysis of class E networks is developed that aids in the rapid yet accurate assessment of circuit performance. The first-order analysis provides an intuitive evaluation of class E operation and harmonic content of the switch waveforms. The analysis is shown to be applicable to both class E amplifiers and multipliers, providing closed-form equations for an intelligent first design. The proposed class E tripler configuration is evaluated using this technique and is shown to be a practically viable solution for achieving high DC-to-RF efficiency. Techniques involved in the design and implementation of the novel frequency tripler are investigated, and three microstrip circuits are presented that provide high drain efficiency, high unwanted harmonic rejection and low DC power consumption. Innovative design of the input matching circuit that exploits the nonlinear input capacitance of the device, and the output matching circuit that simultaneously provides appropriate harmonic terminations and unwanted harmonic rejection, ensure a simultaneously high achievable conversion gain and DC-to-RF efficiency. Practical demonstration of the three novel circuits display the highest reported DC-to-RF efficiency and conversion gain for m~crowave frequency triplers to date. Trade-oITs between circ.uit complexity,size and simultaneously achievable high efficiency and high conversion gain are identified and elucidated with the three novel designs