To conduct analyses of variability of threshold voltage (Vth) in FinFETs whose structures are based on the ITRS, sensitivity coefficients of variations of Vth caused by the fluctuation of principal device parameters were derived by device simulation. The sensitivity coefficient correlated with each device parameter was separated into two factors: one due to an intrinsic mechanism (1D factor) and another due to short-channel effects (2D factor). The 1D and 2D factors were found to cancel each other out in some cases, thereby reducing the sensitivity coefficient. Based on these results, FinFETs with various structures were examined and controlling short-channel effects was demonstrated to be an effective way to reduce the variation in the thr...
In this paper, a novel device/circuit co-design scheme, namely Dynamic-Adjusting Threshold-Voltage S...
Abstract:- The paper proposes a procedure to calculate the sensitivity factors of the quiescent drai...
In this paper, a novel device/circuit co-design scheme, namely Dynamic-Adjusting Threshold-Voltage S...
Clarification of robustness for threshold voltage (Δth) variation in FinFETs is very important. Vth ...
Abstract: As the device feature size enters into the nanoscale, the modeling and simulation of short...
A compact model to correlate FinFET device variability to the spatial fluctuation of fin-width is de...
This paper studies the impact of fin width of channel on temperature and electrical characteristics ...
A simple device-level characterization approach to quantitatively evaluate the impacts of different ...
Characteristic variation of FinFET due to Fin vertical nonuniformity is simulated in this paper, bas...
In this paper, a generalized model to predict fin-width roughness (FWR) induced FinFET device variab...
We investigate the statistical variability of the threshold voltage and its sensitivity to critical ...
This paper investigates the effect of process variations on unity gain frequency (ft) in 30 nm gate ...
This paper investigates the effect of process variations on unity gain frequency (ft) in 30 nm gate ...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...
A comprehensive statistical variability simulation study of a 10nm gate length FinFET device is pres...
In this paper, a novel device/circuit co-design scheme, namely Dynamic-Adjusting Threshold-Voltage S...
Abstract:- The paper proposes a procedure to calculate the sensitivity factors of the quiescent drai...
In this paper, a novel device/circuit co-design scheme, namely Dynamic-Adjusting Threshold-Voltage S...
Clarification of robustness for threshold voltage (Δth) variation in FinFETs is very important. Vth ...
Abstract: As the device feature size enters into the nanoscale, the modeling and simulation of short...
A compact model to correlate FinFET device variability to the spatial fluctuation of fin-width is de...
This paper studies the impact of fin width of channel on temperature and electrical characteristics ...
A simple device-level characterization approach to quantitatively evaluate the impacts of different ...
Characteristic variation of FinFET due to Fin vertical nonuniformity is simulated in this paper, bas...
In this paper, a generalized model to predict fin-width roughness (FWR) induced FinFET device variab...
We investigate the statistical variability of the threshold voltage and its sensitivity to critical ...
This paper investigates the effect of process variations on unity gain frequency (ft) in 30 nm gate ...
This paper investigates the effect of process variations on unity gain frequency (ft) in 30 nm gate ...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...
A comprehensive statistical variability simulation study of a 10nm gate length FinFET device is pres...
In this paper, a novel device/circuit co-design scheme, namely Dynamic-Adjusting Threshold-Voltage S...
Abstract:- The paper proposes a procedure to calculate the sensitivity factors of the quiescent drai...
In this paper, a novel device/circuit co-design scheme, namely Dynamic-Adjusting Threshold-Voltage S...