Harvesting the full potential of single-crystal semiconductor nanowires (NWs) for advanced nanoscale field-effect transistors (FETs) requires a smart combination of charge control architecture and functional semiconductors. In this article, high-performance vertical gate-all-around NW p-type FETs (p-FETs) are presented. The device concept is based on advanced Ge0.92Sn0.08/Ge group IV epitaxial heterostructures, employing quasi–one-dimensional semiconductor NWs fabricated with a top-down approach. The advantage of using a heterostructure is the possibility of electronic band engineering with band offsets tunable by changing the semiconductor stoichiometry and elastic strain. The use of a Ge0.92Sn0.08 layer as the source in GeSn/Ge NW p-FETs ...
With rapid increase in energy consumption of electronics used in our daily life, the building blocks...
In this work, the fabrication and the electrical characterization of the germanium-based vertical p-...
In this thesis fabrication and optimization of vertical III-V Tunneling Field-Effect transistors was...
A process for the fabrication of vertical gate-all-around (GAA) nanowire p-FETs with diameters of do...
textThe scaling of metal-oxide-semiconductor (MOS) field-effect transistors (FETs) has continued for...
The tremendous success of complementary metal oxide semiconductor (CMOS) technology over the last fi...
Ge1-xSnx alloys form a heterogeneous material system with high potential for applications in both op...
III–V compound semiconductor and Ge are promising channel materials for future low-power and high-pe...
Why semiconducting nanowires? Semiconductor nanowires are potential alternatives to conventional pla...
n- and p-type Ge nanowires were synthesized by a multistep process in which axial elongation, via va...
Abstract: The attractive properties of semiconductor nanowires (NWs) are making them an appealing p...
Ge1-xSnx alloys form a heterogeneous material system with high potential for applications in both op...
Different vertical nanowire heterojunction devices were fabricated and tested based on vertical Ge n...
Towards gate-all-around (GAA) FETs, we present the top-down realization of vertical Ge nanowires (NW...
Vertical GeSn gate-all-around (GAA) nanowire nMOSFETs fabricated using a top-down approach are prese...
With rapid increase in energy consumption of electronics used in our daily life, the building blocks...
In this work, the fabrication and the electrical characterization of the germanium-based vertical p-...
In this thesis fabrication and optimization of vertical III-V Tunneling Field-Effect transistors was...
A process for the fabrication of vertical gate-all-around (GAA) nanowire p-FETs with diameters of do...
textThe scaling of metal-oxide-semiconductor (MOS) field-effect transistors (FETs) has continued for...
The tremendous success of complementary metal oxide semiconductor (CMOS) technology over the last fi...
Ge1-xSnx alloys form a heterogeneous material system with high potential for applications in both op...
III–V compound semiconductor and Ge are promising channel materials for future low-power and high-pe...
Why semiconducting nanowires? Semiconductor nanowires are potential alternatives to conventional pla...
n- and p-type Ge nanowires were synthesized by a multistep process in which axial elongation, via va...
Abstract: The attractive properties of semiconductor nanowires (NWs) are making them an appealing p...
Ge1-xSnx alloys form a heterogeneous material system with high potential for applications in both op...
Different vertical nanowire heterojunction devices were fabricated and tested based on vertical Ge n...
Towards gate-all-around (GAA) FETs, we present the top-down realization of vertical Ge nanowires (NW...
Vertical GeSn gate-all-around (GAA) nanowire nMOSFETs fabricated using a top-down approach are prese...
With rapid increase in energy consumption of electronics used in our daily life, the building blocks...
In this work, the fabrication and the electrical characterization of the germanium-based vertical p-...
In this thesis fabrication and optimization of vertical III-V Tunneling Field-Effect transistors was...