Proceedings of the 18th International Workshop on Post-Binary ULSI Systems May 20, 2009, Naha, Okinawa, Japan.This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. As such, it is in the public domain, and under the provisions of Title 17, United States Code, Section 105, may not be copyrighted.This paper introduces design methods for numeric function generators (NFGs) using decision diagrams. NFGs are hardware accelerators to compute values of numeric functions such as trigonometric, logarithmic, square root, and reciprocal functions..
Implementation of a high-speed numeric function generator on a COTS reconfigurable compute
Introduction Let D be some finite alphabet of symbols, (a set of "digits"). A numeration ...
This thesis deals with the design of a simple time-sharing arbitrary-function generator to be used i...
This paper proposes a design method for floating-point numerical function generators (NFGs) using mu...
This paper proposes a design method for floating-point numerical function generators (NFGs) using mu...
We show the architecture and design of a numeric function generator that realizes, at high speed, ar...
Abstract This paper proposes a new architecture for memorybased floating-point numeric function gene...
IPSJ Transactions on System LSI Design Methodology, Vol. 3, pp.118-129, Feb. 2010.This publication i...
Abstract—This paper proposes an architecture and a synthesis method for high-speed computation of fi...
We present a new technique for defining, analysing, and simplifying digital functions, through hand-...
In this paper, we propose a new representation of numeric functions using a piecewise arithmetic exp...
Ordered Binary Decision Diagrams (OBDDs) have found widespread use in CAD applications such as form...
This paper analyzes complexities of decision diagrams for elementary functions such as polynomial, t...
AbstractThis paper proposes an extension to the D-algorithm, for integrated circuits described using...
Best paper awardInternational audienceA typical floating-point environment includes sup-port for a s...
Implementation of a high-speed numeric function generator on a COTS reconfigurable compute
Introduction Let D be some finite alphabet of symbols, (a set of "digits"). A numeration ...
This thesis deals with the design of a simple time-sharing arbitrary-function generator to be used i...
This paper proposes a design method for floating-point numerical function generators (NFGs) using mu...
This paper proposes a design method for floating-point numerical function generators (NFGs) using mu...
We show the architecture and design of a numeric function generator that realizes, at high speed, ar...
Abstract This paper proposes a new architecture for memorybased floating-point numeric function gene...
IPSJ Transactions on System LSI Design Methodology, Vol. 3, pp.118-129, Feb. 2010.This publication i...
Abstract—This paper proposes an architecture and a synthesis method for high-speed computation of fi...
We present a new technique for defining, analysing, and simplifying digital functions, through hand-...
In this paper, we propose a new representation of numeric functions using a piecewise arithmetic exp...
Ordered Binary Decision Diagrams (OBDDs) have found widespread use in CAD applications such as form...
This paper analyzes complexities of decision diagrams for elementary functions such as polynomial, t...
AbstractThis paper proposes an extension to the D-algorithm, for integrated circuits described using...
Best paper awardInternational audienceA typical floating-point environment includes sup-port for a s...
Implementation of a high-speed numeric function generator on a COTS reconfigurable compute
Introduction Let D be some finite alphabet of symbols, (a set of "digits"). A numeration ...
This thesis deals with the design of a simple time-sharing arbitrary-function generator to be used i...