The 40 MHz trigger-less DAQ for the LHCb upgrade

The LHCb experiment focuses on flavour physics, aiming to enhance the current knowledge of CP violation parameters and exploit new physics signatures studying rare decays of b and c hadrons. A major upgrade of the detector is foreseen during the second long shutdown (2018–2019) to allow to collect an order of magnitude more data with respect to Run 1 and Run 2. The current maximum readout rate of 1MHz is a limitation for the hadronic trigger. The upgraded detector will implement a full read-out running at the LHC bunch crossing frequency, using a software trigger. A high-throughput interface board has been designed to read-out the detector at 40MHz. The read-out boards allow a cost-effective implementation of the DAQ by means of a high-speed PC network. The redesigned DAQ system collects data fragments from the subdetector, performs the event building, and transports data to the High-Level software trigger at an estimated aggregate rate of ∼ 32Tbit/s. Possible technologies candidates for the high-speed network under study are InfiniBand and Gigabit Ethernet. In order the explore and find the best implementation we performed several tests using an Event Builder evaluator on small size test beds and HPC scale facilities. Up to date performance results are presented