Abstract-We introduce a new logic style called Pseudo-Static Current Mode Logic (PSCML), which aims to alleviate the power consumption and delay overhead concerns that have thwarted the wide-spread acceptance of a previously proposed Dynamic Current Mode Logic (DyCML) style. Different from DyCML, the proposed new logic style may be viewed by its environment as static, hence any PSCML-based gate/module can be readily embedded into static CMOS designs to construct CMOS/PSCML hybrid circuits. Simulation results show that, at the cost of some area increase, PSCML is faster and consumes less power than DyCML for most applications
Abstract—MOS Current-Mode Logic (MCML) is usually used for high-speed applications. However, the lar...
We survey state-of-the-art optimization methods that target low power dissipation in VLSI circuits. ...
In the growing field of digital applications, designing portable devices with minimal power dissipat...
With the growing demands of portable devices, it is necessary to pay attention to low-power digital ...
This paper proposes hybrid dynamic current mode logic (H-DyCML) as an alternative to existing dynami...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...
In this paper, we realize a high performance arithmetic circuits which is faster and have lower powe...
A new differential static CMOS logic (DSCL) family is devised. The new circuit is fully static, maki...
We present more evidence in a 0.25 μm CMOS technology that the pass-transistor logic (PTL) structure...
A new differential static CMOS logic (DSCL) family is devised. The new circuit is fully static, maki...
In this work, MOS Current Mode Logic (MCML) is analyzed for low power, low noise, mixed signal appli...
For a few decades, CMOS has been well known for a quite efficient design methodology. With its uniqu...
In the last years, MOS Current-Mode Logic (MCML) circuits are gaining a remarkable interest in sever...
This paper introduces and compares two topologies for the C-element in MCML and two topologies for d...
A new logic style called low-swing current mode logic (LSCML) is presented. It features a dynamic an...
Abstract—MOS Current-Mode Logic (MCML) is usually used for high-speed applications. However, the lar...
We survey state-of-the-art optimization methods that target low power dissipation in VLSI circuits. ...
In the growing field of digital applications, designing portable devices with minimal power dissipat...
With the growing demands of portable devices, it is necessary to pay attention to low-power digital ...
This paper proposes hybrid dynamic current mode logic (H-DyCML) as an alternative to existing dynami...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...
In this paper, we realize a high performance arithmetic circuits which is faster and have lower powe...
A new differential static CMOS logic (DSCL) family is devised. The new circuit is fully static, maki...
We present more evidence in a 0.25 μm CMOS technology that the pass-transistor logic (PTL) structure...
A new differential static CMOS logic (DSCL) family is devised. The new circuit is fully static, maki...
In this work, MOS Current Mode Logic (MCML) is analyzed for low power, low noise, mixed signal appli...
For a few decades, CMOS has been well known for a quite efficient design methodology. With its uniqu...
In the last years, MOS Current-Mode Logic (MCML) circuits are gaining a remarkable interest in sever...
This paper introduces and compares two topologies for the C-element in MCML and two topologies for d...
A new logic style called low-swing current mode logic (LSCML) is presented. It features a dynamic an...
Abstract—MOS Current-Mode Logic (MCML) is usually used for high-speed applications. However, the lar...
We survey state-of-the-art optimization methods that target low power dissipation in VLSI circuits. ...
In the growing field of digital applications, designing portable devices with minimal power dissipat...