This work presents a low-phase noise (PN) mm-wave injection-locked frequency multiplier (ILFM) using an ultra-low power frequency-tracking loop (FTL). Monitoring the averages of phase deviations rather than detecting the instantaneous values, the FTL consumed only 600W to calibrate the mm-wave ILFM generating a frequency between 27 and 30GHz. While consuming low power, the proposed FTL effectively regulated the PN degradation, which was less than 2dB up to 100MHz offset across VT variations
The advanced wireless communication standards (e.g., 5G) placed stringent specifications on the RF/m...
A low phase noise injection-locked reference clock multiplier that can suppress the delta-sigma $(De...
DoctorThis thesis presents a fast-lock 2.4GHz fractional-N phase-locked loop (PLL) for ultra-low-pow...
To meet requirements of high data-rates, RF transceivers for a 5G standard must have an ultra-wide b...
oraclA new design methodology is proposed for an ultralow in-band phase noise injection-locked frequ...
Abstract—In this paper, a novel CMOS phase-locked loop (PLL) integrated with an injection-locked fre...
This paper presents a 612–1152 MHz Injection-Locked Frequency Multiplier (ILFM). The proposed ...
This paper presents a new programmable delay-locked loop based frequency multiplier with a period er...
\ua9 2019 IEEE. This paper presents a millimeter-wave (mm-wave) phase-locked loop (PLL), with an ou...
This paper presents a low jitter ring-VCO based injection-locked clock multiplier (RILCM) with a pha...
The fractional-N frequency synthesis based on Digital Phase Locked Loop (DPLLs) has become a conven...
Due to the rapid development of Complementary Metal-Oxide-Semiconductor (CMOS) deep-submicron techno...
A low-jitter, ring-type voltage-controlled oscillator (VCO)-based injection-locked clock multiplier ...
As RF transceivers move into the mm-wave frequency range, one of the key issues faced in the design ...
An injection-locked clock multiplier (ILCM) is considered to be a promising solution that can genera...
The advanced wireless communication standards (e.g., 5G) placed stringent specifications on the RF/m...
A low phase noise injection-locked reference clock multiplier that can suppress the delta-sigma $(De...
DoctorThis thesis presents a fast-lock 2.4GHz fractional-N phase-locked loop (PLL) for ultra-low-pow...
To meet requirements of high data-rates, RF transceivers for a 5G standard must have an ultra-wide b...
oraclA new design methodology is proposed for an ultralow in-band phase noise injection-locked frequ...
Abstract—In this paper, a novel CMOS phase-locked loop (PLL) integrated with an injection-locked fre...
This paper presents a 612–1152 MHz Injection-Locked Frequency Multiplier (ILFM). The proposed ...
This paper presents a new programmable delay-locked loop based frequency multiplier with a period er...
\ua9 2019 IEEE. This paper presents a millimeter-wave (mm-wave) phase-locked loop (PLL), with an ou...
This paper presents a low jitter ring-VCO based injection-locked clock multiplier (RILCM) with a pha...
The fractional-N frequency synthesis based on Digital Phase Locked Loop (DPLLs) has become a conven...
Due to the rapid development of Complementary Metal-Oxide-Semiconductor (CMOS) deep-submicron techno...
A low-jitter, ring-type voltage-controlled oscillator (VCO)-based injection-locked clock multiplier ...
As RF transceivers move into the mm-wave frequency range, one of the key issues faced in the design ...
An injection-locked clock multiplier (ILCM) is considered to be a promising solution that can genera...
The advanced wireless communication standards (e.g., 5G) placed stringent specifications on the RF/m...
A low phase noise injection-locked reference clock multiplier that can suppress the delta-sigma $(De...
DoctorThis thesis presents a fast-lock 2.4GHz fractional-N phase-locked loop (PLL) for ultra-low-pow...